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US4005273A Expired / Lapsed US ⏱️ 0.0 years remaining

Multiplexer offset removal circuit

Assignee: Western Atlas International Inc
•
Filing: 1976-03-08
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Granted: 1977-01-25
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Expires: 1996-03-08
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Abstract

Abstract In a multi-channel multiplexed system, each signal-receiving input channel has a DC blocking capacitor. One of the input channels to the multiplexer is grounded making this channel a test channel. A signal-conditioner-and-amplifier network (SCAN) couples the multiplexer output to a utilization device. The spurious voltage developed across the capacitor in the test channel combined with the offset voltage across the SCAN will be substantially the same as each one of the spurious voltages developed across the capacitors in the other input channels in combination with the SCAN offset voltage. A sample-and-hold circuit consisting of a series capacitor and a normally ungrounded shunt switch is connected between the output of the SCAN and the input to the utilization device. Periodically, as during each scan cycle of the multiplexer, the capacitor in the sample-and-hold circuit will be charged to and hold a sample voltage having equal amplitude but opposite polarity to the spurious voltage developed across the test channel capacitor in combination with the SCAN.

Inventors

  • 👤 Lee E. Siems

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-02 23:00
CPC Classifications
H; H04; H04J; H04J3/00; H04J3/02; H04J3/10

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 72 words
An analog-to-digital signal acquisition system comprising: a plurality of input channels; a multiplexer having a plurality of inputs and a common output bus; a capacitor connected between each of said input channels and one of said multiplexer inputs, each said capacitor having a spurious voltage developed thereacross; means for connecting one of said input channels to ground; circuit means including an amplifier for connecting said multiplexer bus to a utilization device; and
Claim 2
Dependent Claim 72 words
An analog-to-digital signal acquisition system comprising: a plurality of input channels; a multiplexer having a plurality of inputs and a common output bus; a capacitor connected between each of said input channels and one of said multiplexer inputs, each said capacitor having a spurious voltage developed thereacross; means for connecting one of said input channels to ground; circuit means including an amplifier for connecting said multiplexer bus to a utilization device; and
Claim 3
Dependent Claim 81 words
a sample-and-hold circuit connected between said circuit means and said utilization device, said sample-and-hold circuit means comprising a shunt switch and a series capacitor for developing a sample voltage thereacross equal and of opposite polarity to said spurious voltage each time that the grounded input channel is scanned by said multiplexer and said shunt switch is closed, whereby in use, the sample voltage will successively cancel out the spurious voltages from said signal-receiving channels, as the multiplexer scans the signal-receiving channels.
Claim 4
Dependent Claim 81 words
a sample-and-hold circuit connected between said circuit means and said utilization device, said sample-and-hold circuit means comprising a shunt switch and a series capacitor for developing a sample voltage thereacross equal and of opposite polarity to said spurious voltage each time that the grounded input channel is scanned by said multiplexer and said shunt switch is closed, whereby in use, the sample voltage will successively cancel out the spurious voltages from said signal-receiving channels, as the multiplexer scans the signal-receiving channels.
Claim 5
Dependent Claim 26 words
The system of claim 1 wherein the capacitor in the grounded input channel and the capacitors in the other input channels have the same capacitance value.
Claim 6
Dependent Claim 17 words
The system as defined in claim 1 wherein said utilization circuit is a binary gain ranging amplifier.
Claim 7
Dependent Claim 15 words
The system as defined in claim 1 wherein said circuit means includes a buffer amplifier.
Claim 8
Dependent Claim 18 words
The system as defined in claim 1 wherein said circuit means is a signal conditioning and amplifying network.
Claim 9
Dependent Claim 31 words
The system as defined in claim 1 wherein means for applying analog signals having a wide dynamic range are connected to all of said input channels except said one input channel.
Claim 10
Dependent Claim 23 words
The system as defined in claim 1 wherein seismic sensors are connected to all of said input channels except said one input channel.
Claim 11
Dependent Claim 39 words
The system as defined in claim 1 wherein said system includes controller circuit means for concurrently connecting said one grounded input circuit to said multiplexer and for closing said shunt switch to ground the output of said series capacitor.

References Cited (Backward Citations)

US3059228A Cited
US3740481A Cited
US3911226A Cited
US3819864A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1980-01-25 1980-07-26 1981-01-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1984-01-25 1984-07-26 1985-01-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1988-01-25 1988-07-26 1989-01-25 $7700.00 Window Closed / Lapsed

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