Time delay circuit

Abstract

Abstract An electric timing circuit for the time delayed delivery of a voltage pulse to an electric fuze element or other current or voltage sensitive element uses a capacitor voltage source which can be charged from an external source of electric potential. The capacitor discharges through the leakage resistance of its dielectric and through leakage resistance of semiconductor devices in the biased "off" state, until the capacitor voltage decreases to a preset value, at which time a threshold value switch connects the electric element to the capacitor voltage source. The threshold value switch is constituted by two series connected Field Effect Transistors, one N channel type and one P channel type. Both transistors are biased in the "off" condition by the circuit connections until the capacitor voltage decreases to the threshold level and turns both transistors "on". The two non-conducting transistor channels in series permit a very long discharge time for a given capacitor. One embodiment of the invention utilizes the negligible current threshold switch in series with the gate circuit of a thyristor to trigger the thyristor and permit a large current flow through the thyristor and the series connected electric element. A second embodiment of the invention uses the two-transistor threshold switch in series with a sensitive electric element.

Inventors

• 👤 Floyd S. Griffin

Bibliographic Details