Circuit device for secondary electron multipliers

Claim 2

Circuit device for a multi-stage secondary electron multiplier, said multiplier having a source of primary electrons, a number of successive dynodes, and at least one electron collecting electrode as an anode, said circuit further comprising a voltage divider having a lower and an upper end terminal and successive taps, said divider comprising serially connected impedance means, said lower terminal being coupled to a negative supply voltage, said upper terminal being held at an essentially non-negative potential, said dynodes being coupled to said taps, the first dynode being the lowest one, said circuit further comprising signal coupling means which comprise at least one load resistor and an amplifier coupled to a signal output terminal and operating near reference zero potential, and gain switching means, wherein at least two of said dynodes have individual load resistors, said load resistors being interconnected between said dynodes and said taps, said switching means comprising at least two series of fixed contacts connected to said dynodes and said taps, respectively, and at least three ganged movable contacts for changing the number of activated dynode stages, the first and the second one of said movable contacts connecting one selected dynodes and one corresponding tap to said amplifier, said selected dynode operating as the last active dynode, the third of said movable contacts coupling the dynode succeeding to said selected dynode to a positive drain voltage, said succeeding dynode operating as an effective anode.

Claim 3

The circuit as claimed in claim 1 wherein said amplifier and said load resistor of said selected dynode form a current-to-voltage transducer, said amplifier being an inverting operational amplifier, said first and second movable contact connecting input and output of said amplifier to said selected dynode and said corresponding tap, respectively, said amplifier effecting a negative feedback to said voltage divider.

Claim 4

The circuit as claimed in claim 2 wherein said voltage divider means are series-connected and essentially equal divider resistors, said load resistors being essentially equal, the resistance ratio of said divider resistors and said load resistors being not smaller than unity and not larger than the gain factor per dynode stage of said multiplier at a preselected operating voltage per dynode stage.

Claim 5

The circuit as claimed in claim 3 wherein said resistance ratio is approximately equal to: v +1/v -2, wherein v is the gain factor.

Claim 6

The circuit as claimed in claim 4 wherein said source of primary electrons is a photocathode coupled to said lower terminal, said resistance ratio not applying to the lowest section of said voltage divider corresponding to the first dynode stage of said multiplier, the divider resistor of this section being at least partly replaced by a Zener diode.

Claim 7

The circuit as claimed in claim 1 wherein the operating voltages across the majority of said activated dynode stages, measured between two successive taps of said voltage divider, are essentially equal, said drain voltage being at least of the same size as said operating voltages.

Claim 8

The circuit as claimed in claim 6 further comprising means coupling at least two dynodes succeeding to said selected dynode to said drain voltage.

Claim 9

The circuit as claimed in claim 7 wherein rectifier diodes are connected between adjacent taps of said voltage divider, the cathodes and anodes of said diodes being directed towards said upper and lower terminal, respectively, and further comprising a biasing resistor interconnected between the cathode of the upper most of said diodes and reference zero potential.

Claim 10

The circuit as claimed in claim 7 wherein said third movable contact is supplemented by a series of succeeding movable contacts forming a summing-type switch and coupling said succeeding dynodes to said drain voltage.

Claim 11

The circuit as claimed in claim 1 wherein said source of primary electrons is a photocathode coupled to said lower terminal of said voltage divider, further comprising a load resistor interconnected between said cathode and said lower terminal, said cathode and said lower terminal being connected to said first and said second set of contacts, respectively, in order to select also said photocathode in place of a selected dynode and to operate said multiplier as a photodiode.

Claim 12

The circuit as claimed in claim 1, further comprising means which provide a current flow through said voltage divider to the terminal of said negative supply voltage which is essentially independent on said number of activated dynode stages.

Claim 13

The circuit as claimed in claim 11 comprising a series of dropping resistors are serially interconnected between said lower terminal of said voltage divider and said negative supply terminal, said switching means further comprising a set of fixed contacts connected to said dropping resistors and another ganged movable contact shunting part of said dropping resistors.

Claim 14

The circuit as claimed in claim 12, said circuit further comprising means for selectively increasing the operating voltage of the first dynode stage of said multiplier when switching to the lowest number of activated dynode stages, said means comprising: the lowest section of said voltage divider corresponding to said first dynode stage having an auxiliary terminal connected to said other movable contact, said section being formed as a triangular network and having a diode connected with its anode and cathode to said lower and said auxiliary terminal, respectively.

Claim 15

The circuit as claimed in claim 2 wherein the most positive dynode selectable by said switching means has no individual tap and no feedback to said voltage divider but means for switching its load resistor, said means comprising: said dynode being connected to said first set of contacts and coupled to serially connected load resistors, said load resistors increasing from the load resistor connected to said dynode to the load resistor farthest apart from said dynode, the effective load resistance being selected and coupled to said output of said amplifier by said second movable contact and by fixed contacts which are in-line with said second set of contacts.

Claim 16

The circuit as claimed in claim 14 wherein two diodes are coupled across at least one of said serially connected load resistors, said diodes being serially connected with rectifier diodes coupled across said taps of said voltage divider and becoming conductive upon decreasing said number of activated dynode stages.

Claim 17

The circuit as claimed in claim 1 wherein said source of primary electrons is a photocathode, further comprising a current limiting resistor interconnected into the lead of said photocathode, and means including a clamping diode connected to said cathode and a diode biasing circuit, said means effecting a constant voltage drop across said current limiting resistor as long as said photocathode is operated within its normal current range.

Claim 18

Circuit device for a multi-stage secondary electron multiplier, said multiplier having a source of primary electrons, successive dynodes, and anode, said circuit further comprising a voltage divider having a lower end terminal coupled to a negative supply voltage, an upper end terminal held at an essentially nonnegative potential, and successive taps coupled to said dynodes, the first dynode being the lowest one, said voltage divider comprising essentially equal divider resistors up from the tap coupled to said first dynode, said circuit further comprising switching means for switching the number of activated dynode stages, at least one load resistor with any switchable dynode coupled to said voltage divider, and an amplifier having an input and at least one output and operating near reference zero potential, said switching means comprising at least two sets of fixed contacts, the first and the second one of said sets connected to said dynodes and said taps, respectively, and at least three ganged movable contacts, the first and the second one of said movable contacts connecting one selected dynode and one corresponding tap to said input and output of said amplifier, respectively, said selected dynode operating as the last active dynode, said amplifier effecting a feedback to said voltage divider, the third of said movable contacts coupling the dynode succeeding to said selected dynode to a positive drain voltage, said succeeding dynode operating as an anode, wherein said switchable dynodes have first and second load resistors, the resistance ratio of said divider resistors and said first load resistors being not smaller than unity and not larger than the gain factor per dynode stage of said multiplier, said second load resistors being smaller as said first load resistors, said first and second load resistors having first and second terminals, said first and second terminals of said first load resistors being coupled to said dynodes and connected to the corresponding taps of said voltage divider, respectively, said first and second terminals of said second load resistors being connected to said dynodes and to a series of capacitors, said series of capacitors being coupled to said reference potential.

Claim 19

Circuit device for a multi-stage secondary electron multiplier, said multiplier having a source of primary electrons, successive dynodes, and anode, said circuit further comprising a voltage divider having a lower end terminal coupled to a negative supply voltage, an upper end terminal held at an essentially nonnegative potential, and successive taps coupled to said dynodes, the first dynode being the lowest one, said voltage divider comprising essentially equal divider resistors up from the tap coupled to said first dynode, said circuit further comprising switching means for switching the number of activated dynode stages, at least one load resistor with any switchable dynode coupled to said voltage divider, and an amplifier having an input and at least one output and operating near reference zero potential, said switching means comprising at least two sets of fixed contacts, the first and the second one of said sets connected to said dynodes and said taps, respectively, and at least three ganged movable contacts, the first and the second one of said movable contacts connecting one selected dynode and one corresponding tap to said input and output of said amplifier, respectively, said selected dynode operating as the last active dynode, said amplifier effecting a feedback to said voltage divider, the third of said movable contacts coupling the dynode succeeding to said selected dynode to a positive drain voltage, said succeeding dynode operating as an anode, wherein said switchable dynodes have first and second load resistors, the resistance ratio of said divider resistors and said first load resistors being not smaller than unity and not larger than the gain factor per dynode stage of said multiplier, said second load resistors being smaller as said first load resistors, said first and second load resistors having first and second terminals, said first and second terminals of said first load resistors being coupled to said dynodes and connected to the corresponding taps of said voltage divider, respectively, said first and second terminals of said second load resistors being connected to said dynodes and to a series of capacitors, said series of capacitors being coupled to said reference potential.

Claim 20

The circuit as claimed in claim 17 wherein said capacitors are serially connected, further comprising at least one set of fixed contacts connected to said second terminals of said second load resistors and an auxiliary movable contact ganged with said switching device, said auxiliary movable contact connecting the second terminal of the second load resistor of said selected dynode to said reference potential, said third movable contact connecting the second load resistor of said succeeding dynode to said drain voltage, and rectifier diodes connected across said capacitors, the cathodes and anodes of said diodes being directed towards the upper and lower dynodes, respectively, a biasing resistor interconnected between the cathode of the upper most of said diodes and said reference potential.

Claim 21

The circuit as claimed in claim 17 wherein said first terminals of said first and second load resistors are jointly connected to said dynodes.

Claim 22

The circuit as claimed in claim 18 wherein said first terminals of said first load resistors are connected to said second terminals of said second resistors and that a further resistor is interconnected between said first and second movable contact; said further resistor having essentially the same value as said first load resistors.

Claim 23

The circuit as claimed in claim 17 wherein said second load resistors and said capacitors are mounted in an adapter unit having a connector fitting into a multi-lead socket, further having a socket accepting said multiplier.

Claim 24

The circuit as claimed in claim 21 wherein said adapter unit comprises a switch ganged with said switching device when said connector is in its operational position within said multi-lead socket.

Claim 25

The circuit as claimed in claim 17 wherein the output of said amplifier connected to said second movable contact has a predetermined signal rise time; and each of said secon load resistors forms, together with the associated capacity of said capacitors, a time constant which is not smaller and not more than 20 times larger than said signal rise time.

Claim 26

The circuit as claimed in claim 17 wherein said amplifier comprises a first and a second amplifier unit having first and second output, respectively, said first output coupling a signal to a signal output terminal, said second amplifier unit having a larger gain factor and a larger risetime constant than said first unit, said second output coupling a feedback signal to said voltage divider.

Claim 27

The circuit as claimed in claim 24 comprising two serially coupled operational amplifier units, the input of the first one being connected to said first movable contact, further being coupled to said first output by a feedback resistor, the second one having non-inverting and inverting input, said non-inverting input coupled to said first output, said inverting input coupled to said second output by a divider network, the DC-division ratio of said network corresponding to the resistance ratio of said feedback resistor to said first load resistors.

Claim 28

The circuit as claimed in claim 25 having RC-networks connected with said non-inverting and inverting inputs, further comprising a capacitor serially connected with said feedback resistor, both forming a time constant which is essentially equal to the time constants of said RC-networks.

Claim 29

The circuit as claimed in claim 24 using a fast differential amplifier and a slower operational amplifier for said first and second amplifier units, said fast amplifier having first and second input, said first input and the input of said operational amplifier being coupled to said first movable contact, further comprising a divider network connected between said second output and said second input, the division ratio of said network being equal to the reciprocal resistance ratio of said first and second load resistors.

Claim 30

The circuit as claimed in claim 1 wherein a series of capacitors is connected to said dynodes, said capacitors being connected to said reference potential by a complementary summing-type switch ganged to said switching device, said complementary switch disengaging the capacitor connected to said selected dynode.

Claim 31

The circuit as claimed in claim 1 wherein each set of contacts of said switching device comprises at least one movable contact and a number of stationary contacts, and that said movable and stationary contacts are formed and positioned such that, when switching, at least said second movable contact breaks after and closes before said first movable contact breaks and closes, respectively.

Claim 32

The circuit as claimed in claim 18 wherein each set of contacts of said switching device comprises at least one movable contact and a number of stationary contacts, and that said movable and stationary contacts are formed and positioned such that, when switching, said first movable contact breaks before and closes after said second and said auxiliary movable contacts break and close, respectively, said third movable contact touching intermediate contacts arranged between said stationary contacts, said intermediate contacts being positioned and connected such that said capacitors are discharged via a high-impedance discharge path.

Claim 33

The circuit as claimed in claim 17, further comprising current limiting means in at least one lead of said supply and drain voltages.

Claim 34

The circuit as claimed in claim 31, wherein said current limiting means is formed by a two-terminal bridge circuit having at least four arms, comprising in opposite arms resistors and voltage limiting diodes, respectively, and at least one high-voltage transistor in the center part.

Claim 35

The circuit as claimed in claim 1 said switching device further comprising locking means including an auxiliary switch controlling said supply and drain voltages, said locking means releasing said switching device only if said voltages are switched off.

Claim 36

The circuit device as claimed in claim 1 wherein said amplifier is provided with overload indicating means.

Claim 37

The circuit as claimed in claim 1 wherein said switching device and other components forming said circuit are arranged adjacent a plug-in socket of said multiplier, said load resistors and means forming said divider being attached in a zigzag-fashion to the terminals of said switching device.

Claim 38

The circuit as claimed in claim 1 wherein said multiplier, said switching device and electronic components forming said circuit are housed in a metal housing, having a multi-lead connector for operating said circuit, and forming a self-contained unit.