Detection system for spatially-distributed set of radiation beams manifesting multibit binary code

Claim 1

In a system comprising first means including a linear array of n substantially contiguous sensing elements for detecting the presence or absence of each of a group of spatially-distributed beams of given radiation in which each beam manifests an individual bit of an m-bit binary code which has a predetermined binary value, said m-bit binary code being of the type in which the bit situated in a given one of the end bit positions is a synch bit having said predetermined binary value, wherein each of said beams is incident on a plural-member subset of said contiguous elements, and wherein the respective number of contiguous elements corresponding to the center-to-center spacing of each respective adjacent pair of bit positions of said binary code is predetermined; the improvement therewith comprising: a. a shift register having a respective ordinal stage corresponding to each ordinal one of said contiguous elements of said array, said shift register being coupled to said array for storing the detected signal outputs from said respective elements of said array; b. means for applying shift pulses to said shift register at a predetermined clock rate to read out said shift register in a direction such that the first bit position read out is said sync bit; c. a normally closed gate coupled to said shift register for forwarding the readout from said shift register to utilization means only in response to the opening thereof; d. an initially reset counter coupled to said gate for opening said gate in response to each of a set of predetermined counts having been counted in order by said counter, each of said set of predetermined counts corresponding to the center-to-center spacing of each successive adjacent pair of bit positions; and e. second means including a sync bit detector coupled between said shift register and said counter which (1) is operative prior to a sync bit read out from said shift register being detected by said sync bit detector for applying no counting input to said counter, (2) is operative while the detection of said read out sync bit by said sync bit detector is occurring for applying a counting input to said counter at half said clock rate, and (3) is operative subsequent to the end of detection of said read out sync bit by said sync bit detector for applying a counting input to said counter at said clock rate.