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US3990018A Expired / Lapsed US ⏱️ 0.0 years remaining

Transistor differential amplifier circuit

Assignee: Hitachi Ltd
•
Filing: 1975-09-10
•
Granted: 1976-11-02
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Expires: 1995-09-10
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Abstract

Abstract In a transistor differential amplifier circuit wherein first and second lateral transistors are connected as loads between respective collectors of a pair of differential amplification transistors and a first power supply terminal, a common emitter of the amplifying transistors is connected to a second power supply terminal through common impedance means, the first lateral transistor is made a multicollector structure, and an output is derived from only one collector of the first lateral transistor, the improvement comprising the fact that the second lateral transistor is also made a multicollector structure and that a collector of the second lateral transistor as corresponds to the aforecited output collector of the first lateral transistor is connected to the second power supply terminal.

Inventors

  • 👤 Yoshiyuki Nakagomi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 11:59
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45076; H03F3/4508; H03F3/45085; H03F2203/00; H03F2203/45; H03F2203/45476; H03F2203/45496; H03F2203/45658; H03F2203/45674; H03F2203/45696

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 179 words
A transistor differential amplifier circuit comprising a first transistor and a second transistor which are of a first conductivity type, a third transistor and a fourth transistor each of which is of a second conductivity type lateral structure including at least a first collector and a second collector, common impedance means, a first power supply terminal, a second power supply terminal, and output means, respective emitters of said first and second transistors being differentially connected and being connected through said common impedance means to said second power supply terminal, collectors of said first and second transistors being respectively connected to the first collectors of said third and fourth transistors, emitters of said third and fourth transistors being respectively connected to said first power supply terminal, said second collector of said third transistor being connected to said second power supply terminal, said second collector of said fourth transistor being connected to said output means, said output means providing therefrom an output signal which is a difference component between two input signals applied to bases of said first and second transistors.
Claim 2
Dependent Claim 179 words
A transistor differential amplifier circuit comprising a first transistor and a second transistor which are of a first conductivity type, a third transistor and a fourth transistor each of which is of a second conductivity type lateral structure including at least a first collector and a second collector, common impedance means, a first power supply terminal, a second power supply terminal, and output means, respective emitters of said first and second transistors being differentially connected and being connected through said common impedance means to said second power supply terminal, collectors of said first and second transistors being respectively connected to the first collectors of said third and fourth transistors, emitters of said third and fourth transistors being respectively connected to said first power supply terminal, said second collector of said third transistor being connected to said second power supply terminal, said second collector of said fourth transistor being connected to said output means, said output means providing therefrom an output signal which is a difference component between two input signals applied to bases of said first and second transistors.
Claim 3
Dependent Claim 35 words
A transistor differential amplifier circuit according to claim 1, wherein said bases of said third and fourth transistors are directly coupled to each other and are directly coupled to said collector of said second transistor.
Claim 4
Dependent Claim 18 words
A transistor differential amplifier circuit according to claim 1, wherein said common impendance means comprises a constant-current circuit.
Claim 5
Dependent Claim 32 words
A transistor differential amplifier circuit according to claim 3, wherein said first and second transistors are n-p-n transistors, and said third and fourth transistors are p-n-p lateral transistors of the multicollector structure.
Claim 6
Dependent Claim 82 words
A transistor differential amplifier circuit according to claim 1, wherein the collector of said first transistor is connected to the first collector of said third transistor through a first resistive means and is connected to the base of said third transistor, the collector of said second transistor is connected to the first collector of said fourth transistor and is connected to the base of said fourth transistor, and respective first collectors of said third and fourth transistors are connected to each other.
Claim 7
Dependent Claim 18 words
A transistor differential amplifier circuit according to claim 5, wherein said common impedance means comprises a constant-current circuit.
Claim 8
Dependent Claim 32 words
A transistor differential amplifier circuit according to claim 6, wherein said first and second transistors are n-p-n transistors, and said third and fourth transistors are p-n-p lateral transistors of the multicollector structure.

References Cited (Backward Citations)

US3848139A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-11-02 1980-05-03 1980-11-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-11-02 1984-05-03 1984-11-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-11-02 1988-05-03 1988-11-02 $7700.00 Window Closed / Lapsed

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