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US3987254A Expired / Lapsed US ⏱️ 0.0 years remaining

Transformerless amplification circuitry for telecommunication system

Assignee: Italtel SpA
•
Filing: 1975-03-20
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Granted: 1976-10-19
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Expires: 1995-03-20
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Abstract

Abstract A two-wire line is connected via a resistive hybrid circuit to a high-impedance output of a transmitter amplifier, carrying outgoing voice signals originating at a microphone, and to a high-impedance input of a receiver amplifier, carrying incoming voice signals destined for an earphone. A biasing network, connected across the line in parallel with the hybrid circuit, includes a pair of cascaded complementary transistors whose collectors are interconnected through a low-ohmic voltage divider supplying operating voltage, balanced with reference to the line voltage, to the transmitter ampllifier and delivering a similarly balanced reference voltage to the receiver amplifier.

Inventors

  • 👤 Roberto Pipitone

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 11:44
CPC Classifications
H; H04; H04M; H04M1/00; H04M1/60; H04M1/6025

Claims Analysis

Total Claims: 11
Claim 1
Independent Claim 133 words
In a telecommunication system, in combination: a two-wire line connected to a source of d-c biasing voltage; a biasing network connected across said line; a signal-transmitting network including first amplifier means with a high-impedance output circuit; a signal-receiving network including second amplifier means with a high-impedance input circuit and with a supply circuit connected across said line; first conductor means connecting said biasing network to said first amplifier means for supplying thereto an operating voltage substantially balanced with respect to the line voltage; second conductor means connecting said biasing network to said second amplifier means for supplying thereto a reference voltage substantially balanced with respect to the line voltage; and a coupling circuit connected across said line and provided with mutually conjugate pairs of terminals respectively connected across said input and output circuits.
Claim 2
Dependent Claim 133 words
In a telecommunication system, in combination: a two-wire line connected to a source of d-c biasing voltage; a biasing network connected across said line; a signal-transmitting network including first amplifier means with a high-impedance output circuit; a signal-receiving network including second amplifier means with a high-impedance input circuit and with a supply circuit connected across said line; first conductor means connecting said biasing network to said first amplifier means for supplying thereto an operating voltage substantially balanced with respect to the line voltage; second conductor means connecting said biasing network to said second amplifier means for supplying thereto a reference voltage substantially balanced with respect to the line voltage; and a coupling circuit connected across said line and provided with mutually conjugate pairs of terminals respectively connected across said input and output circuits.
Claim 3
Dependent Claim 33 words
The combination defined in claim 1 wherein said first amplifier means comprises a transistor stage with supply terminals connected by said first conductor means across a low-resistance intermediate section of said biasing network.
Claim 4
Dependent Claim 22 words
The combination defined in claim 2 wherein said signal-transmitting network comprises a piezoelectric microphone connected across an input of said transistor stage.
Claim 5
Dependent Claim 53 words
The combination defined in claim 2 wherein said coupling network comprises a resistance bridge with two opposite high-resistance arms and two opposite low-resistance arms forming a first diagonal connected across said line and a second diagonal connected across a matching impedance, said low-resistance arms having their midpoints connected across said high-impedance output circuit.
Claim 6
Dependent Claim 29 words
The combination defined in claim 4 wherein said high-impedance output circuit comprises a pair of complementary transistors controlled by said transistor stage and connected in cascade between said midpoints.
Claim 7
Dependent Claim 29 words
The combination defined in claim 1 wherein said second amplifier means comprises a differential-amplifier stage with a supply circuit including a control transistor connected to said second conductor means.
Claim 8
Dependent Claim 22 words
The combination defined in claim 6 wherein said signal-receiving network comprises a piezoelectric earphone connected across an output of said differential-amplifier stage.
Claim 9
Dependent Claim 53 words
The combination defined in claim 6 wherein said coupling network comprises a resistance bridge with two opposite high-resistance arms and two opposite low-resistance arms forming a first diagonal connected across said line and a second diagonal connected across a matching impedance, said high-resistance arms having their midpoints connected across said high-impedance input circuit.
Claim 10
Dependent Claim 29 words
The combination defined in claim 8 wherein said high-impedance input circuit comprises a pair of differentially interconnected transistors in series with a common transistor driven by said control transistor.
Claim 11
Dependent Claim 37 words
The combination defined in claim 1 wherein said biasing network comprises a pair of cascaded complementary transistors with collectors interconnected through a low-ohmic voltage divider, said first and second conductor means being connected to said voltage divider.

References Cited (Backward Citations)

US3027429A Cited
US3022379A Cited
US3030446A Cited
US3033940A Cited
US3784755A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-10-19 1980-04-19 1980-10-19 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-10-19 1984-04-19 1984-10-19 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-10-19 1988-04-19 1988-10-19 $7700.00 Window Closed / Lapsed

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