US3983497A
Expired / Lapsed
US
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Phase locked loop
Assignee: Blaupunkt Werke GmbH
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Filing: 1975-03-10
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Granted: 1976-09-28
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Expires: 1995-03-10
Abstract
Abstract A signal frequency, controlled by the output of a phase comparator, is obtained from a constant or reference signal frequency source by means of a frequency divider, the division ratio of which is voltage-controlled and variable, the control signal being obtained from the output of the phase comparator, in digital, or analog form. When in analog form, a monostable multivibrator is interposed so that a voltage-controlled divider having a division ratio of an average, predetermined factor can be used. The signal, the frequency of which is to be identified, is applied as one input to the phase comparator for comparison with the output signal from the frequency divider, the comparison providing the aforementioned division control signal.
Inventors
- 👤 Wilhelm Hegeler
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 23:29
CPC Classifications
H; H03; H03D; H03D3/00; H03D3/02; H03D3/24; G; G01; G01R; G01R23/00; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/099; H03L7/0991; H03L7/0992
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
194 words
A phase locked loop comprising a phase comparator (2) having a signal input (M) to which an input signal (f M ) is applied and a comparison input (L) to which a comparison signal (f L ) developed within the phase locked loop is applied, and a comparison output having a comparison output signal appear thereon which is representative of the relative phase position of the signals applied to said inputs (M, L); and a controllable frequency divider/multiplier (1) having a control input (B) to control the division/multiplication ratio (a) thereof in accordance with the comparison output signals applied to said control input (B); a fixed reference frequency (f F ) being applied to said divider/multiplier (1), the divider/multiplier providing an output frequency (f L ), said output frequency (f L ) forming said comparison signal being applied to the phase comparator (2), said output frequency (f L ) being representative of the reference frequency divided by the division/multiplication ratio (a) of the frequency divider/multiplier; the output signal of said phase comparator (2) being connected to, and controlling the control input (B) of said frequency divider/multiplier (1) to control the division/multiplication ratio (a) thereof.
Claim 2
Dependent Claim
194 words
A phase locked loop comprising a phase comparator (2) having a signal input (M) to which an input signal (f M ) is applied and a comparison input (L) to which a comparison signal (f L ) developed within the phase locked loop is applied, and a comparison output having a comparison output signal appear thereon which is representative of the relative phase position of the signals applied to said inputs (M, L); and a controllable frequency divider/multiplier (1) having a control input (B) to control the division/multiplication ratio (a) thereof in accordance with the comparison output signals applied to said control input (B); a fixed reference frequency (f F ) being applied to said divider/multiplier (1), the divider/multiplier providing an output frequency (f L ), said output frequency (f L ) forming said comparison signal being applied to the phase comparator (2), said output frequency (f L ) being representative of the reference frequency divided by the division/multiplication ratio (a) of the frequency divider/multiplier; the output signal of said phase comparator (2) being connected to, and controlling the control input (B) of said frequency divider/multiplier (1) to control the division/multiplication ratio (a) thereof.
Claim 3
Dependent Claim
15 words
Phase locked loop according to claim 1, wherein the frequency divider/multiplier (1) is voltage controllable.
Claim 4
Dependent Claim
36 words
Phase locked loop according to claim 1, wherein the comparison output signal from the phase comparator is in form of a digital signal, said digital signal controlling the division/multiplication ratio (a) of the frequency divider/multiplier (1).
Claim 5
Dependent Claim
61 words
Phase locked loop according to claim 1, wherein the comparison output signal from the phase comparator (2') is in form of an analog signal of varying voltage; and a monostable multivibrator (4) is provided, controlled by said analog output signal from the phase comparator (2'), the output of the monostable multivibrator controlling the division/multiplication ratio (a) of the frequency divider/multiplier (1').
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-09-28 | 1980-03-29 | 1980-09-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-09-28 | 1984-03-29 | 1984-09-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-09-28 | 1988-03-29 | 1988-09-28 | $7700.00 | Window Closed / Lapsed |