US3976952A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sense amplifier
Assignee: 148074 HOLDINGS CANADA Ltd
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Filing: 1974-08-16
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Granted: 1976-08-24
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Expires: 1994-08-16
Abstract
Abstract A sense amplifier having three transistor stages. A balanced differential input stage with high noise immunity to capacitively coupled noise. A second threshold stage is provided with protection against an output being caused by a permanent potential on the input, false trigger protection circuitry, and protection against supply voltage and other minor variations. A differential output stage increases noise immunity of the amplifier output and protects against a short circuit in the output.
Inventors
- 👤 David M. Shaver
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 22:11
CPC Classifications
G; G11; G11C; G11C11/00; G11C11/02; G11C11/06; G11C11/06007; G11C11/06014; G11C11/06021; G11C11/06028; G11C11/06042; H; H03; H03K; H03K5/00; H03K5/01; H03K5/02
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
137 words
A sense amplifier comprising: balanced differential input means having an output; threshold circuit means coupled to the output of said differential input means having an output, said threshold circuit means comprising an AC coupling capacitor, false trigger prevention means, first amplifying transistor means and second output transistor means, whereby the output of said balanced differential input means is coupled to the base of said first amplifying transistor means though said AC coupling capacitor and the output of said first amplifying transistor means is coupled to the base of said second output transistor means and the ouput of said second output transistor means is a single output at a specified voltage, and said false trigger prevention means is coupled to said first amplifying transistor means; and complementary output means coupled to the output of said threshold circuit means.
Claim 2
Dependent Claim
137 words
A sense amplifier comprising: balanced differential input means having an output; threshold circuit means coupled to the output of said differential input means having an output, said threshold circuit means comprising an AC coupling capacitor, false trigger prevention means, first amplifying transistor means and second output transistor means, whereby the output of said balanced differential input means is coupled to the base of said first amplifying transistor means though said AC coupling capacitor and the output of said first amplifying transistor means is coupled to the base of said second output transistor means and the ouput of said second output transistor means is a single output at a specified voltage, and said false trigger prevention means is coupled to said first amplifying transistor means; and complementary output means coupled to the output of said threshold circuit means.
Claim 3
Dependent Claim
123 words
A sense amplifier comprising; balanced differential input means having an output; threshold circuit means coupled to the output of said differential input means having an output; and complementary output means coupled to the output of said threshold circuit means and comprising phase splitting transistor means; two complementary output transistor means; and short circuit protection means comprising resistor means in the emitter circuits of each of said complementary output transistor means; whereby the output of said threshold circuit means is coupled to the base of said phase splitting transistor means and the output of said phase splitting transistor means is two outputs, one coupled to each complementary output transistor means, and the output of each complementary output transistor means are the sense amplifier outputs.
Claim 4
Dependent Claim
123 words
A sense amplifier comprising; balanced differential input means having an output; threshold circuit means coupled to the output of said differential input means having an output; and complementary output means coupled to the output of said threshold circuit means and comprising phase splitting transistor means; two complementary output transistor means; and short circuit protection means comprising resistor means in the emitter circuits of each of said complementary output transistor means; whereby the output of said threshold circuit means is coupled to the base of said phase splitting transistor means and the output of said phase splitting transistor means is two outputs, one coupled to each complementary output transistor means, and the output of each complementary output transistor means are the sense amplifier outputs.
Claim 5
Dependent Claim
294 words
A sense amplifier comprising: having an output comprising; first and second signal input means; first and second impedance means; first and second transistor means; and current source means; whereby said first and second signal input means are coupled through said first and second impedance means respectively to the base of said first and second transistor means respectively, and said current source means is coupled to the emitters of said first and second transistor means and the output of said balanced differential input means comprises a single output from said second transistor means; threshold circuit means coupled to the output of said differential input means comprising; an AC coupling capacitor; false trigger prevention means; first amplifying transistor means; and second output transistor means; whereby the output of said balanced differential input means is coupled to the base of said amplifying transistor means through said AC coupling capacitor and the output of said first amplifying transistor means is coupled to the base of said second output transistor means and the output of said second output transistor means is a single output at a specified voltage, and said false trigger prevention means is coupled to said first amplifying transistor means; and complementary output means coupled to the output of said threshold circuit means and comprising; phase splitting transistor means; two complementary output transistor means; and short circuit protection means comprising resistor means in the emitter circuits of each of said complementary output transistor means; whereby the output of said threshold circuit means is coupled to the base of said phase splitting transistor means and the output of said phase splitting transistor means is two outputs, one coupled to each complementary output transistor means and the output of each complementary output transistor means is the sense amplifier output.
Claim 6
Dependent Claim
294 words
A sense amplifier comprising: having an output comprising; first and second signal input means; first and second impedance means; first and second transistor means; and current source means; whereby said first and second signal input means are coupled through said first and second impedance means respectively to the base of said first and second transistor means respectively, and said current source means is coupled to the emitters of said first and second transistor means and the output of said balanced differential input means comprises a single output from said second transistor means; threshold circuit means coupled to the output of said differential input means comprising; an AC coupling capacitor; false trigger prevention means; first amplifying transistor means; and second output transistor means; whereby the output of said balanced differential input means is coupled to the base of said amplifying transistor means through said AC coupling capacitor and the output of said first amplifying transistor means is coupled to the base of said second output transistor means and the output of said second output transistor means is a single output at a specified voltage, and said false trigger prevention means is coupled to said first amplifying transistor means; and complementary output means coupled to the output of said threshold circuit means and comprising; phase splitting transistor means; two complementary output transistor means; and short circuit protection means comprising resistor means in the emitter circuits of each of said complementary output transistor means; whereby the output of said threshold circuit means is coupled to the base of said phase splitting transistor means and the output of said phase splitting transistor means is two outputs, one coupled to each complementary output transistor means and the output of each complementary output transistor means is the sense amplifier output.
Claim 7
Dependent Claim
221 words
An improved sense amplifier for a memory and line receiver arrangement, said memory arrangement comprising a plurality of ring shaped magnetic cores with an individual sense winding on each core, word wires selectively threaded through the inside of some of said cores and outside of others to thereby store information, and memory input means to select one of said word wires and supply a current pulse thereto, to thereby generate an output pulse in the sense windings of each core having the selected wire threaded through it, each output pulse is coupled to said improved sense amplifier on balanced sense output lines, said improved sense amplifier comprising: balanced differential input means having an output coupled to said balanced sense output lines and comprising; first and second signal input means; first and second impedance means; first and second transistor means; and current source means; whereby said first and second signal input means are coupled through said first and second impedance means respectively to the base of said first and second transistor means respectively, and said current source means is coupled to the emitters of said first and second transistor means, and the output of said balanced differential input means comprises a single output from said second transistor means; threshold circuit means coupled to the output of said differential input means and comprising;
Claim 8
Dependent Claim
221 words
An improved sense amplifier for a memory and line receiver arrangement, said memory arrangement comprising a plurality of ring shaped magnetic cores with an individual sense winding on each core, word wires selectively threaded through the inside of some of said cores and outside of others to thereby store information, and memory input means to select one of said word wires and supply a current pulse thereto, to thereby generate an output pulse in the sense windings of each core having the selected wire threaded through it, each output pulse is coupled to said improved sense amplifier on balanced sense output lines, said improved sense amplifier comprising: balanced differential input means having an output coupled to said balanced sense output lines and comprising; first and second signal input means; first and second impedance means; first and second transistor means; and current source means; whereby said first and second signal input means are coupled through said first and second impedance means respectively to the base of said first and second transistor means respectively, and said current source means is coupled to the emitters of said first and second transistor means, and the output of said balanced differential input means comprises a single output from said second transistor means; threshold circuit means coupled to the output of said differential input means and comprising;
Claim 9
Dependent Claim
182 words
an AC coupling capacitor; false trigger prevention means; first amplifying transistor means; and second output transistor means; whereby the output of said balanced differential input means is coupled to the base of said first amplifying transistor means through said AC coupling capacitor and the output of said first amplifying transistor means is coupled to the base of said second output transistor means is a single output at a specified voltage, and said false trigger prevention means is coupled to said first amplyifying transistor means; and complementary output means coupled to the output of said threshold circuit means and said line receiver arrangement and comprising; phase splitting transistor means; two complementary output transistor means; and short circuit protection means comprising resistor means in the emitter circuits of each of said complementary output transistor means; whereby the output of said threshold circuit means is coupled to the base of said phase splitting transistor means and the output of said phase splitting transistor means is two outputs, one coupled to each complementary output transistor means is the sense amplifier output to said line receiver arrangement.
Claim 10
Dependent Claim
182 words
an AC coupling capacitor; false trigger prevention means; first amplifying transistor means; and second output transistor means; whereby the output of said balanced differential input means is coupled to the base of said first amplifying transistor means through said AC coupling capacitor and the output of said first amplifying transistor means is coupled to the base of said second output transistor means is a single output at a specified voltage, and said false trigger prevention means is coupled to said first amplyifying transistor means; and complementary output means coupled to the output of said threshold circuit means and said line receiver arrangement and comprising; phase splitting transistor means; two complementary output transistor means; and short circuit protection means comprising resistor means in the emitter circuits of each of said complementary output transistor means; whereby the output of said threshold circuit means is coupled to the base of said phase splitting transistor means and the output of said phase splitting transistor means is two outputs, one coupled to each complementary output transistor means is the sense amplifier output to said line receiver arrangement.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-08-24 | 1980-02-23 | 1980-08-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-08-24 | 1984-02-23 | 1984-08-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-08-24 | 1988-02-23 | 1988-08-24 | $7700.00 | Window Closed / Lapsed |