US3973197A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Peak detector
Assignee: Schenck Pegasus Corp
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Filing: 1974-07-22
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Granted: 1976-08-03
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Expires: 1994-07-22
Abstract
Abstract Structure for and a method of detecting peaks in an electric signal comprising circuits for and the steps of converting a selected one of a plurality of analog signals into a current digital signal, comparing the developed digital signal with a digital signal previously developed from the selected analog signal and stored, and replacing the previously developed and stored digital signal with the current digital signal when the current digital signal is greater than the previously developed and stored digital signal and of the same polarity, and providing for readout of the currently stored digital signal in either analog or digital form. Direct reading of the digital output in terms of standard engineering units is provided for. Also, the analog input signal may be directly read at the output of the peak detector and the peak detector may be utilized as a volt meter with a direct current signal passed directly into a digital output portion of the peak detector. The peak detector may be operated automatically or manually and upper and lower peak signals may be reset manually.
Inventors
- 👤 Walter E. Meyer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 15:51
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/04
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
251 words
Structure for substantially instantaneously detecting a peak in an analog electrical signal comprising analog to digital converter means for substantially instantaneously developing current digital signals representative of the current value of the analog electrical signal, storage means for storing a digital signal representative of a previous peak in the analog signal connected to the analog to digital converter means, comparator means for substantially instantaneously comparing each current digital signal with the stored digital signal connected to the converter and comparator, peak latch control logic means for substantially instantaneously replacing the stored digital signal in the storage means with each developed current digital signal having a predetermined relation to a stored digital signal to provide a new stored digital signal connected to the comparator means and storage means and timing means connected to the comparator and to the peak latch control logic means for cyclically providing a first pulse of duration sufficient to permit the comparator to compare the stored and current digital signals, a second delay pulse immediately following the first pulse to permit the structure to become electrically stable, the trailing edge of which permits operation of the peak latch control means, a third pulse immediately following the second pulse for providing a safety wait time delay to allow the structure to again become electrically stable after operation of the peak latch control logic means, and a fourth pulse immediately following the third pulse on the leading edge of which the converter is actuated and the timing cycle is re-started.
Claim 2
Dependent Claim
251 words
Structure for substantially instantaneously detecting a peak in an analog electrical signal comprising analog to digital converter means for substantially instantaneously developing current digital signals representative of the current value of the analog electrical signal, storage means for storing a digital signal representative of a previous peak in the analog signal connected to the analog to digital converter means, comparator means for substantially instantaneously comparing each current digital signal with the stored digital signal connected to the converter and comparator, peak latch control logic means for substantially instantaneously replacing the stored digital signal in the storage means with each developed current digital signal having a predetermined relation to a stored digital signal to provide a new stored digital signal connected to the comparator means and storage means and timing means connected to the comparator and to the peak latch control logic means for cyclically providing a first pulse of duration sufficient to permit the comparator to compare the stored and current digital signals, a second delay pulse immediately following the first pulse to permit the structure to become electrically stable, the trailing edge of which permits operation of the peak latch control means, a third pulse immediately following the second pulse for providing a safety wait time delay to allow the structure to again become electrically stable after operation of the peak latch control logic means, and a fourth pulse immediately following the third pulse on the leading edge of which the converter is actuated and the timing cycle is re-started.
Claim 3
Dependent Claim
49 words
Structure as set forth in claim 1 including means for storing a digital signal representative of both the positive and negative peak of the analog signal and for comparing both the stored digital signals with the currently developed digital signals whereby both positive and negative peaks may be detected.
Claim 4
Dependent Claim
21 words
Structure as set forth in claim 1 and further including means for automatic and manual resetting of the peak detector structure.
Claim 5
Dependent Claim
26 words
Structure as set forth in claim 1 and further including means for providing a readout of the stored signal in both a digital and analog mode.
Claim 6
Dependent Claim
26 words
Structure as set forth in claim 4 and further including means for providing the readout in the digital mode directly in a plurality of standard units.
Claim 7
Dependent Claim
25 words
Structure as set forth in claim 1 and further including means for directly reading out the input signal from which the digital signal is developed.
Claim 8
Dependent Claim
20 words
Structure as set forth in claim 1 and further including means for using the peak detector as a volt meter.
Claim 9
Independent Claim
147 words
The method of detecting peaks in an analog signal comprising periodically substantially instantaneously converting the analog signal to a digital signal, storing the digital signal, substantially instantaneously comparing each subsequent conversion of the analog signal into a digital signal with the stored digital signal, delaying replacing the stored digital signal with a subsequent digital signal of greater absolute value for a first time sufficient to complete the comparing and for a second time sufficient for the peak detecting structure to become stable and then substantially instantaneously replacing the stored digital signal with a subsequent digital signal when the subsequent digital signal is of greater absolute value than the stored digital signal and then providing a safety time delay to again allow the peak detecting structure to become stable and subsequently again converting the analog signal to a digital signal to start a new cycle of peak detecting.
Claim 10
Independent Claim
147 words
The method of detecting peaks in an analog signal comprising periodically substantially instantaneously converting the analog signal to a digital signal, storing the digital signal, substantially instantaneously comparing each subsequent conversion of the analog signal into a digital signal with the stored digital signal, delaying replacing the stored digital signal with a subsequent digital signal of greater absolute value for a first time sufficient to complete the comparing and for a second time sufficient for the peak detecting structure to become stable and then substantially instantaneously replacing the stored digital signal with a subsequent digital signal when the subsequent digital signal is of greater absolute value than the stored digital signal and then providing a safety time delay to again allow the peak detecting structure to become stable and subsequently again converting the analog signal to a digital signal to start a new cycle of peak detecting.
Claim 11
Dependent Claim
64 words
The method as set forth in claim 8 and further including storing digital signals representing both the positive and negative peaks of the analog signal and comparing the stored digital signals with the developed digital signals and replacing the stored digital signals with the developed digital signals when either a positive or negative developed digital signal is greater than the similar stored digital signal.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-08-03 | 1980-02-02 | 1980-08-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-08-03 | 1984-02-02 | 1984-08-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-08-03 | 1988-02-02 | 1988-08-03 | $7700.00 | Window Closed / Lapsed |