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US3971993A Expired / Lapsed US ⏱️ 0.0 years remaining

High capacity recirculating delay loop integrator

Assignee: Individual
•
Filing: 1972-04-21
•
Granted: 1976-07-27
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Expires: 1992-04-21
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Abstract

Abstract A system for integrating recurring pulses. A pulse compression system. A delay network for recirculating the input pulses. The system output is a pulse which substantially equals the sum of input pulses.

Inventors

  • 👤 James N. Constant

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 03:44
CPC Classifications
H; H03; H03F; H03F1/00; H03F1/32; H03F1/3223; H03F1/3229; G; G01; G01S; G01S13/00; G01S13/02; G01S13/06; G01S13/08; G01S13/10; G01S13/26; G01S13/28; G01S7/00; G01S7/02; G01S7/28; G01S7/285; G01S7/292; G01S7/2923; G01S7/2926

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 194 words
A signal integrating system comprising a recirculating delay loop integrator including a delay network having feedforward error correction and time delay means wherein said network includes: a power divider defining a first main signal path and a second reference signal path, said first path including a first main amplifier and a first delay line, said second path including a second compensating delay line for compensating the delay time of said first amplifier, and a third delay line having a delay time substantially equal to that of said first delay line; a differencing network having said first and second paths as inputs and providng an output varying as a function of error introduced in signals in said first path by said first amplifier, with an attenuator connected between said first path and said differencing network; a second amplifier having the differencing network output as an input; and an injection network having said first path and said second amplifier output as inputs and providing an output for recirculation to said power divider, with a fourth compensating delay line connected between said first path and said injection network for compensating the delay time of said second amplifier.
Claim 2
Dependent Claim 194 words
A signal integrating system comprising a recirculating delay loop integrator including a delay network having feedforward error correction and time delay means wherein said network includes: a power divider defining a first main signal path and a second reference signal path, said first path including a first main amplifier and a first delay line, said second path including a second compensating delay line for compensating the delay time of said first amplifier, and a third delay line having a delay time substantially equal to that of said first delay line; a differencing network having said first and second paths as inputs and providng an output varying as a function of error introduced in signals in said first path by said first amplifier, with an attenuator connected between said first path and said differencing network; a second amplifier having the differencing network output as an input; and an injection network having said first path and said second amplifier output as inputs and providing an output for recirculation to said power divider, with a fourth compensating delay line connected between said first path and said injection network for compensating the delay time of said second amplifier.
Claim 3
Dependent Claim 31 words
A system as defined in claim 1 including first and second frequency shifters in said first and second paths, respectively, for shifting the frequency of signals as a function of time.
Claim 4
Dependent Claim 31 words
A system as defined in claim 1 wherein said delay network includes frequency shifting means for shifting the frequency of signals as a function of time in a number of recirculations.
Claim 5
Independent Claim 214 words
A method of integrating input signals in a recirculating delay loop integrator having a negative feedback loop with a delay network, by correcting for the imperfection of components in the recirculating loop by a feedforward correction and delaying the signals integrating them in a number of recirculations in the delay network, including the steps of: splitting said signals into first and second slit signals along first and second paths; amplifying the first split signal in said first path; compensating the amplification delay of the first split signal by compensating delaying the second split signal in said second path; delaying the split signals in said first and second paths by equal amounts; differencing a portion of the amplified and delayed first signal with the twice delayed second signal to obtain a difference signal representing the error introduced as a result of the imperfection of the amplification and time delay of the first split signal; amplifying the difference signal; compensating the amplification delay of the amplified difference signal by compensating delaying the first split signal in said first path; and comparing the amplified, delayed and twice compensated first signal with the amplified difference signal to obtain a signal for recirculation representing the time delayed first signal substantially free of errors resulting from amplification and time delay.
Claim 6
Independent Claim 214 words
A method of integrating input signals in a recirculating delay loop integrator having a negative feedback loop with a delay network, by correcting for the imperfection of components in the recirculating loop by a feedforward correction and delaying the signals integrating them in a number of recirculations in the delay network, including the steps of: splitting said signals into first and second slit signals along first and second paths; amplifying the first split signal in said first path; compensating the amplification delay of the first split signal by compensating delaying the second split signal in said second path; delaying the split signals in said first and second paths by equal amounts; differencing a portion of the amplified and delayed first signal with the twice delayed second signal to obtain a difference signal representing the error introduced as a result of the imperfection of the amplification and time delay of the first split signal; amplifying the difference signal; compensating the amplification delay of the amplified difference signal by compensating delaying the first split signal in said first path; and comparing the amplified, delayed and twice compensated first signal with the amplified difference signal to obtain a signal for recirculation representing the time delayed first signal substantially free of errors resulting from amplification and time delay.
Claim 7
Dependent Claim 23 words
The method of claim 4 including the step of shifting the frequency of the first and second signals by substantially the same amount.
Claim 8
Dependent Claim 24 words
The method of claim 4 including the step of shifting the frequency of signals as a function of time in a number of recirculations.

References Cited (Backward Citations)

US2736021A Cited
US2841704A Cited
US3092778A Cited
US3201705A Cited
US3471798A Cited
US3541467A Cited
US3649927A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-07-27 1980-01-26 1980-07-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-07-27 1984-01-26 1984-07-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-07-27 1988-01-26 1988-07-27 $7700.00 Window Closed / Lapsed

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