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US3971923A Expired / Lapsed US ⏱️ 0.0 years remaining

Ramp function generator

Assignee: United States Department of the Navy
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Filing: 1975-03-31
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Granted: 1976-07-27
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Expires: 1995-03-31
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Abstract

Abstract A control circuit having a digital memory for providing sweep voltages to ceivers in a doppler satellite tracking station of proper amplitude and duration to ensure searching in the correct doppler frequency range. An internally generated ramp function voltage is combined with a reference voltage to produce a composite sweep signal for the receiver. The reference voltage level is determined either from a set of digi-switches or from a digital memory circuit which outputs a digital signal that is a function of the frequency of a received doppler signal.

Inventors

  • 👤 John L. Linder

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 03:08
CPC Classifications
H; H03; H03K; H03K4/00; H03K4/06; H03K4/08; H03K4/48; G; G01; G01S; G01S11/00; G01S11/02; G01S11/10; G01S13/00; G01S13/02; G01S13/50; G01S13/58; G01S13/585; G01S13/586; G01S13/66

Claims Analysis

Total Claims: 2
Claim 1
Independent Claim 148 words
A circuit for generating a ramp function signal comprising: a. means for providing a constant-frequency A-C signal having an output; b. a multiple-bit binary counter circuit having an input and a plurality of outputs, said input being connected to said output of said means for providing a constant frequency signal, said plurality of outputs having a digital signal thereon; c. a digital-to-analog converter having a plurality of inputs and an output, said plurality of inputs being connected to said plurality of outputs of said multiple-bit counter such that said digital signal is transmitted in parallel to said digital-to-analog converter, said output of said digital-to-analog converter being said ramp function signal, said counter counting up until filled and then returning to zero such that said digital-to-analog converter outputs a periodic ramp signal wherein the ramp signal starts each period at zero and ends each period at a maximum value.
Claim 2
Dependent Claim 148 words
A circuit for generating a ramp function signal comprising: a. means for providing a constant-frequency A-C signal having an output; b. a multiple-bit binary counter circuit having an input and a plurality of outputs, said input being connected to said output of said means for providing a constant frequency signal, said plurality of outputs having a digital signal thereon; c. a digital-to-analog converter having a plurality of inputs and an output, said plurality of inputs being connected to said plurality of outputs of said multiple-bit counter such that said digital signal is transmitted in parallel to said digital-to-analog converter, said output of said digital-to-analog converter being said ramp function signal, said counter counting up until filled and then returning to zero such that said digital-to-analog converter outputs a periodic ramp signal wherein the ramp signal starts each period at zero and ends each period at a maximum value.

References Cited (Backward Citations)

US3657558A Cited
US3577084A Cited
US3662160A Cited
US3882486A Cited
US3885138A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-07-27 1980-01-26 1980-07-27 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-07-27 1984-01-26 1984-07-27 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-07-27 1988-01-26 1988-07-27 $7700.00 Window Closed / Lapsed

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