US3971860A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for making device for high resolution electron beam fabrication
Assignee: International Business Machines Corp
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Filing: 1975-02-26
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Granted: 1976-07-27
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Expires: 1995-02-26
Abstract
Abstract The disclosed method is one which provides an extremely thin substrate upon which there can be laid down a high resolution pattern of material such as metal by an electron beam fabrication technique. The latter technique is one wherein a resist is placed on the surface of the substrate. Thereafter, an electron beam is utilized to expose the resist in the desired pattern. The exposed resist is then removed and the metal or other material is laid down on the locations where the resist has been removed. With the use of the very thin substrate, the amount and effect of electron backscattering is substantially minimized whereby the consequent decrease of resolution due to exposure of the resist with the backscattered electrons is effectively eliminated. Accordingly, the resist exposure can be confined to much narrower widths than heretofore possible with known electron beam fabrication techniques.
Inventors
- 👤 Alec N. Broers
- 👤 Thomas O. Sedgwick
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 16:15
CPC Classifications
G; G03; G03F; G03F7/00; G03F7/004; G03F7/09; G03F7/095; G03F7/0957; B; B23; B23K; B23K15/00; B23K15/08; H; H10; H10P; H10P14/00; H10P14/40; H10P14/412; H10P50/00; H10P50/60; H10P50/64; H10P50/642; H10P50/644; H10P76/00; H10P76/20; H10P76/204; H10P76/2045; Y; Y10; Y10S; Y10S430/00; Y10S430/143
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
219 words
A method for making devices for high resolution electron beam fabrication comprising the steps of: coating two parallel surfaces of a semiconductor wafer substrate with first and second layers of a base material on opposing surfaces, coating said first and second layers of base material with a suitable photoresist material, exposing the first of said photoresist layers in a predetermined pattern, developing said exposed photoresist to expose the first of said base material layers in said predetermined pattern, etching said first base material layer with a suitable etchant to thereby expose the surface of said substrate thereunder in said predetermined pattern, removing the photoresist layers from said base material layers, etching the surface of said substrate until it is completely dissolved thereby producing thin windows consisting of the second of said base material layers according to said predetermined pattern, depositing an electron resist on said second base material layer, exposing said resist to an electron beam at the location of said thin windows in a predetermined pattern, developing said resist in said predetermined pattern to expose the surface of said second base material layer, and depositing a metal on said surface of said second base material layer and thereafter removing the unexposed resist and metal thereon to provide a highly resolved metal pattern on said second base material layer.
Claim 2
Independent Claim
219 words
A method for making devices for high resolution electron beam fabrication comprising the steps of: coating two parallel surfaces of a semiconductor wafer substrate with first and second layers of a base material on opposing surfaces, coating said first and second layers of base material with a suitable photoresist material, exposing the first of said photoresist layers in a predetermined pattern, developing said exposed photoresist to expose the first of said base material layers in said predetermined pattern, etching said first base material layer with a suitable etchant to thereby expose the surface of said substrate thereunder in said predetermined pattern, removing the photoresist layers from said base material layers, etching the surface of said substrate until it is completely dissolved thereby producing thin windows consisting of the second of said base material layers according to said predetermined pattern, depositing an electron resist on said second base material layer, exposing said resist to an electron beam at the location of said thin windows in a predetermined pattern, developing said resist in said predetermined pattern to expose the surface of said second base material layer, and depositing a metal on said surface of said second base material layer and thereafter removing the unexposed resist and metal thereon to provide a highly resolved metal pattern on said second base material layer.
Claim 3
Dependent Claim
23 words
The method of claim 1 wherein said semiconductor wafer is a silicon wafer and said base material layers are thin silicon nitride layers.
Claim 4
Dependent Claim
18 words
The method of claim 1 wherein said base material layers are from about 300A to about 10,000A thick.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-07-27 | 1980-01-26 | 1980-07-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-07-27 | 1984-01-26 | 1984-07-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-07-27 | 1988-01-26 | 1988-07-27 | $7700.00 | Window Closed / Lapsed |