Sampling phase identification apparatus

Claim 1

In a digital timebase corrector having a triggered oscillator for driving an analogue-to-digital converter for receiving and converting analogue video information to digital form, control means for writing digital information from said converter into storage means, and control means for reading said digital information from said storage means, said oscillator being triggered by means of signals received from a transition detector connected via delay means to a sync pulse separator, said transition detector also being connected to comparator means having an input connected to a band pass filter for receiving said analogue video information, said storage means including a plurality of stores for storing sequential line information; the provision of apparatus comprising: a. means for deriving in-phase and anti-phase Write clock phase identification signals from line frequency sync signals; b. selector means for selecting one of the in-phase or anti-phase signals; c. first latch means for receiving said selected one of said signals; d. means for simultaneously deriving a Read clock phase identification signal at a frequency which is half the line frequency from a sub-carrier reference signal; e. second latch means for receiving the Read clock phase identification signal; f. comparator means for comparing the output signals from the first and second latch means to produce a Write clock phase identification control pulse so as to select the other of the in-phase and anti-phase Write clock phase identification signals in said selector means when the states of the signals applied to the comparator means are dissimilar.