US3965367A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multiple output logic circuits
Assignee: HP Inc
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Filing: 1975-05-05
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Granted: 1976-06-22
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Expires: 1995-05-05
Abstract
Abstract A circuit provides multiple output switching functions. Diodes couple groups of switching elements to form a single complex circuit. The diodes provide isolation between each group so that the logical function of each group may be output, as well as the logical function provided by the coaction of the groups. The present invention is particularly useful in circuits using complementary switching elements, e.g., Complementary Metal Oxide Semiconductor (CMOS) and Silicon on Sapphire (SOS) integrated logic circuits.
Inventors
- 👤 Kenyon Chi-Yen Mei
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 13:28
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/1731; H03K19/08; H03K19/094; H03K19/0944; H03K19/0948
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
158 words
A logic circuit comprising a plurality of complementary switching elements, a first portion of said plurality of complementary switching elements having at least one interconnecting node and coupled between a primary output line and a first power supply line, a second portion of said plurality of complementary switching elements having at least one interconnecting node and being coupled between said primary output line and a second power supply line; an electrical shorting path between the interconnecting node of said first portion of said plurality of complementary switching elements and the interconnecting node of said second portion of said plurality of complementary switching elements; a secondary output line coupled to said electrical shorting path; and one or more diodes coupled to said first and second interconnecting nodes for preventing electrical conduction between said first power supply line and said second power supply line via said electrical shorting path and one or more of the plurality of complementary switching elements.
Claim 2
Dependent Claim
158 words
A logic circuit comprising a plurality of complementary switching elements, a first portion of said plurality of complementary switching elements having at least one interconnecting node and coupled between a primary output line and a first power supply line, a second portion of said plurality of complementary switching elements having at least one interconnecting node and being coupled between said primary output line and a second power supply line; an electrical shorting path between the interconnecting node of said first portion of said plurality of complementary switching elements and the interconnecting node of said second portion of said plurality of complementary switching elements; a secondary output line coupled to said electrical shorting path; and one or more diodes coupled to said first and second interconnecting nodes for preventing electrical conduction between said first power supply line and said second power supply line via said electrical shorting path and one or more of the plurality of complementary switching elements.
Claim 3
Dependent Claim
64 words
The logic circuit as in claim 1 wherein said one or more diodes comprises a first diode coupled between said first interconnecting node and said primary output line, an anode of said first diode being coupled to said first interconnecting node, and a second diode coupled to the second interconnecting node, the cathode of said second diode being coupled to said second interconnecting node.
Claim 4
Independent Claim
146 words
A method for providing secondary output signals from a logic circuit comprising a plurality of complementary switching elements, a first portion of said complementary switching elements being coupled between a primary output line and a first power supply line, a second portion of said complementary switching elements being coupled between said primary output line and a second power supply line, said method comprising the steps of: adding an electrical shorting path between an interconnecting node within said first portion of said complementary switching elements and an interconnecting node of said second portion of complementary switching elements; providing a secondary output line coupled to said electrical shorting path; and inserting one or more diodes to block conductive paths between said first power supply line and said second power supply line via said electrical shorting path and complementary switching elements which may be simultaneously in a conducting state.
Claim 5
Independent Claim
146 words
A method for providing secondary output signals from a logic circuit comprising a plurality of complementary switching elements, a first portion of said complementary switching elements being coupled between a primary output line and a first power supply line, a second portion of said complementary switching elements being coupled between said primary output line and a second power supply line, said method comprising the steps of: adding an electrical shorting path between an interconnecting node within said first portion of said complementary switching elements and an interconnecting node of said second portion of complementary switching elements; providing a secondary output line coupled to said electrical shorting path; and inserting one or more diodes to block conductive paths between said first power supply line and said second power supply line via said electrical shorting path and complementary switching elements which may be simultaneously in a conducting state.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-06-22 | 1979-12-22 | 1980-06-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-06-22 | 1983-12-22 | 1984-06-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-06-22 | 1987-12-22 | 1988-06-22 | $7700.00 | Window Closed / Lapsed |