Digital matched filter and correlator using random access memory

Claim 1

In a system for the digital implementation of matched filters and correlators, the combination of: a first digital delay means having a first random access memory for storing first signals, said first memory having storage locations for n words; a second digital delay means having a second memory for storing second signals, said second memory having storage locations for n words; an address counter connected to said memories for addressing n corresponding storage locations of said first and second memories in a sampling interval providing n pairs of outputs in sequence; clock means connected to said memories and to said address counter for controlling timing operations of said first and second memories and of said address counter, including means for shifting at least said first signals in said first memory after each sampling interval; multiplier means having as its input the n pairs of outputs of said first and said second memories and providing at its output the serial word by word product of said first and said second signals; and integrator means having said multiplier means output as an input for integrating the product over a number of sampling intervals.

Claim 13

A method for the digital implementation of matched filters and correlators using all hardwired components and including the steps of: storing first signals in a first random access memory having storage locations for n words; storing second signals in a second memory having storage locations for n words; addressing corresponding storage locations of the first random access memory and the second memory in a sampling interval and providing n pairs of outputs in sequence; serially multiplying the n pairs of outputs from said first and second memories to produce the word by word product of said signals; shifting at least the first signals in the first memory after each sampling interval, and integrating the products of multiplications over a number of sampling intervals producing the correlation of the first and second signals.

Claim 14

A method for the digital implementation of matched filters and correlators using all hardwired components and including the steps of: storing first signals in a first random access memory having storage locations for n words; storing second signals in a second memory having storage locations for n words; addressing corresponding storage locations of the first random access memory and the second memory in a sampling interval and providing n pairs of outputs in sequence; serially multiplying the n pairs of outputs from said first and second memories to produce the word by word product of said signals; shifting at least the first signals in the first memory after each sampling interval, and integrating the products of multiplications over a number of sampling intervals producing the correlation of the first and second signals.