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US3947761A Expired / Lapsed US ⏱️ 0.0 years remaining

Peak level indicator

Assignee: Sony Corp
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Filing: 1974-08-21
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Granted: 1976-03-30
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Expires: 1994-08-21
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Abstract

Abstract A peak level indicator using a field effect transistor having a semiconductive substrate with a current path portion, first and second semiconductive regions forming a PN junction therebetween, the first region being capacitively coupled to the current path portion to form a capacitor, and a rectified input signal being applied to the second region. The peak level indicator is provided with a level meter indicating a current through the current path portion.

Inventors

  • 👤 Michio Arai

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 13:00
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/30; G01R19/04; G11; G11C; G11C27/00; H; H10; H10D; H10D30/00; H10D30/80; H10D30/83; H10D84/00; H10D84/80; H10D84/811

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 86 words
A peak level indicator comprising: a. a charge storage semiconductor device including a semiconductive substrate with a current path portion, first and second semiconductive regions forming a PN junction therebetween, said first region being capacitively coupled to said current path portion, and a control electrode connected to said second region; b. means for applying a current through said current path portion; c. an indicating means for indicating said current through said current path portion; and d. means for applying an input signal to said control electrode.
Claim 2
Dependent Claim 86 words
A peak level indicator comprising: a. a charge storage semiconductor device including a semiconductive substrate with a current path portion, first and second semiconductive regions forming a PN junction therebetween, said first region being capacitively coupled to said current path portion, and a control electrode connected to said second region; b. means for applying a current through said current path portion; c. an indicating means for indicating said current through said current path portion; and d. means for applying an input signal to said control electrode.
Claim 3
Dependent Claim 22 words
A peak level indicator according to claim 1, wherein a PN junction is formed between said first region and said semiconductive substrate.
Claim 4
Dependent Claim 18 words
A peak level indicator according to claim 1, wherein said input signal applying means includes a rectifying means.
Claim 5
Dependent Claim 36 words
A peak level indicator according to claim 1, wherein said semiconductor device has a third semiconductive region forming a PN junction with said semiconductive substrate and a current supplying means is connected to said third region.
Claim 6
Dependent Claim 24 words
A peak level indicator according to claim 1, further including another semiconductor device connected to said first region of said charge storage semiconductor device.
Claim 7
Dependent Claim 17 words
A peak level indicator according to claim 5, wherein said semiconductor device is a field effect transistor.
Claim 8
Dependent Claim 91 words
A peak level indicator adapted for utilizing a charge storage semiconductor device in an integrated circuit comprising: a. a charge storage junction semiconductor device having a charge storing PN junction, an input, and an output; b. a rectifying signal input means connected to said charge storage device input; c. current means connected to said output of the charge storage semiconductor device for producing a current which is controlled by said charge storage semiconductor device; and d. indicating means connected to said current means for displaying a current of said current means.
Claim 9
Dependent Claim 91 words
A peak level indicator adapted for utilizing a charge storage semiconductor device in an integrated circuit comprising: a. a charge storage junction semiconductor device having a charge storing PN junction, an input, and an output; b. a rectifying signal input means connected to said charge storage device input; c. current means connected to said output of the charge storage semiconductor device for producing a current which is controlled by said charge storage semiconductor device; and d. indicating means connected to said current means for displaying a current of said current means.
Claim 10
Dependent Claim 32 words
A peak level indicator of claim 7 in which a discharge means connects with said charge storage junction semiconductor device for controlling a rate of discharge of said charge storing PN junction.
Claim 11
Dependent Claim 114 words
A peak level indicator of claim 8 in which said charge storage junction semiconductor device comprises a charge storage field effect transistor having a channel protion, source and drain electrodes connected at opposite ends of said channel portion, and first and second semiconductor regions forming a PN junction, said first region being capacitively coupled to said channel portion and a control electrode attached to said second region, said rectifying signal input means comprising a full wave rectifier connected to said gate electrode, said current means comprising a power source and impedance connected in series between said drain and source electrodes, and said indicating means comprising a meter connected between said drain and source electrodes.
Claim 12
Dependent Claim 35 words
A peak level indicator of claim 9 in which said discharge means comprises a current source connected to a third semiconductor region interfaced with said channel region and forming a PN junction at said interface.
Claim 13
Dependent Claim 36 words
A peak level indicator of claim 9 in which said discharge means comprises a junction field effect transistor having a drain-source current path connected to an electrode in contact with said capacitively coupled first semiconductor region.
Claim 14
Dependent Claim 113 words
A peak level indicator of claim 8 in which said charge storage junction semiconductor device comprises a charge storage diode having first and second semiconductor regions forming a PN junction, said first region being capacitively coupled to a third semiconductor region, an electrode being connected to each of said first and second regions, said rectifying signal input means comprising a full wave rectifier connected to said second region electrode, said current means comprising a field effect transistor having a gate connected to said first region electrode and a drain-source channel portion connected to a power source and impedance in series and said indicating means comprising a meter connected across said drain-source FET portion.
Claim 15
Dependent Claim 38 words
A peak level indicator of claim 12 in which said discharge means comprises a fourth semiconductor region interfaced with said third semiconductor region to form a PN junction therewith and a current source connected to said fourth region.

References Cited (Backward Citations)

US3761185A Cited
US3753109A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-03-30 1979-09-29 1980-03-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-03-30 1983-09-29 1984-03-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-03-30 1987-09-29 1988-03-30 $7700.00 Window Closed / Lapsed

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