US3946216A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic calculator system having serial transfer of instruction word fields to decode arrays
Assignee: Texas Instruments Inc
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Filing: 1973-09-24
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Granted: 1976-03-23
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Expires: 1993-09-24
Abstract
Abstract An electronic calculator system implemented in MOS/LSI semiconductor chips which contain data memory, an arithmetic unit, a read-only-memory for storing instruction words, and control circuitry for operating the system, all in monolithic semiconductor units. Parts of the instruction word are decoded at different locations on the chip to produce control functions, using logic arrays. To save space on the chip, the instruction word is transferred serially from an instruction register to the decode arrays where parts of the instruction word are stored and loaded into the arrays in parallel.
Inventors
- 👤 Jerry L. Van Dierendonck
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 05:03
CPC Classifications
G; G11; G11C; G11C17/00; G11C17/08; G11C17/10; G11C17/12; G01; G01R; G01R31/00; G01R31/28; G01R31/317; G01R31/31721; G06; G06F; G06F15/00; G06F15/02
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
379 words
In a calculator system of type having: keyboard input means, display means, and electronic circuitry including a monolithic semiconductor unit having therein a memory for storing data to be operated on, an arithmetic unit included in the semiconductor unit for receiving data from the memory and executing arithmetic functions thereon and returning the data to the memory, the keyboard input means being connected to the semiconductor unit for entering data and functional commands into the calculator system, the display means being connected to the semiconductor unit for providing a visual display of selected data from the memory, and a read-only-memory included in the semiconductor unit for storing a large numer of instruction words for defining the operation of the calculator: an instruction register connected to receive instruction words from the read-only-memory in parallel upon existence of a load command and to thereafter circulate in serial such instruction word, control means including a first mask programmable logic array located at a position on said semiconductor unit remote from the instruction register for defining the operation of the arithmetic unit in response to a first part of the instruction word, a first register having a serial input and parallel output, a single conductor connecting a part of the instruction register to the serial input of the first register whereby the first part of the instruction word is transferred serially to the first register when the instruction word is circulated in the instruction register, a plurality of parallel conductors connecting the parallel outputs of the first register to the first logic array, the control means also including a second mask-programmable logic array located at a position on said semiconductor unit remote from the instruction register and from the first logic array for defining operation of another unit of the system in response to a second part of the instruction word, a second register having a serial inpuut and a parallel output, another single conductor connecting a part of the instruction register to the serial input of the second register whereby the second part of the instruction register is transferred serially to the second register when the instruction word is circulated in the instruction register, a plurality of parallel conductors connecting the parallel outputs of the second register to the second logic array.
Claim 2
Dependent Claim
379 words
In a calculator system of type having: keyboard input means, display means, and electronic circuitry including a monolithic semiconductor unit having therein a memory for storing data to be operated on, an arithmetic unit included in the semiconductor unit for receiving data from the memory and executing arithmetic functions thereon and returning the data to the memory, the keyboard input means being connected to the semiconductor unit for entering data and functional commands into the calculator system, the display means being connected to the semiconductor unit for providing a visual display of selected data from the memory, and a read-only-memory included in the semiconductor unit for storing a large numer of instruction words for defining the operation of the calculator: an instruction register connected to receive instruction words from the read-only-memory in parallel upon existence of a load command and to thereafter circulate in serial such instruction word, control means including a first mask programmable logic array located at a position on said semiconductor unit remote from the instruction register for defining the operation of the arithmetic unit in response to a first part of the instruction word, a first register having a serial input and parallel output, a single conductor connecting a part of the instruction register to the serial input of the first register whereby the first part of the instruction word is transferred serially to the first register when the instruction word is circulated in the instruction register, a plurality of parallel conductors connecting the parallel outputs of the first register to the first logic array, the control means also including a second mask-programmable logic array located at a position on said semiconductor unit remote from the instruction register and from the first logic array for defining operation of another unit of the system in response to a second part of the instruction word, a second register having a serial inpuut and a parallel output, another single conductor connecting a part of the instruction register to the serial input of the second register whereby the second part of the instruction register is transferred serially to the second register when the instruction word is circulated in the instruction register, a plurality of parallel conductors connecting the parallel outputs of the second register to the second logic array.
Claim 3
Dependent Claim
36 words
In an electronic calculator according to claim 1, an address register for defining the location of instruction words in the read-only-memory and parallel conductor means for connecting part of the instruction register to the address register.
Claim 4
Dependent Claim
21 words
In an electronic calculator according to claim 2, means for circulating the address register serially while circulating the instruction register serially.
Claim 5
Dependent Claim
22 words
In an electronic calculator according to claim 1, the second logic array functioning to generate timing mask signals for the arithmetic unit.
Claim 6
Dependent Claim
99 words
In an electronic calculator system using a large-scale-integrated metal-insulator-semiconductor chip, a plurality of instruction word decode logic arrays positioned at spaced apart locations on the chip, each of the logic arrays having a plurality of parallel inputs for receiving parts of the instruction word in parallel, a plurality of registers spaced apart on the chip for receiving said parts of the instruction word in serial and providing parallel outputs to the parallel inputs of the logic arrays, and single conductor means on the chip for transferring in serial the parts of the instruction word into the plurality of registers.
Claim 7
Dependent Claim
99 words
In an electronic calculator system using a large-scale-integrated metal-insulator-semiconductor chip, a plurality of instruction word decode logic arrays positioned at spaced apart locations on the chip, each of the logic arrays having a plurality of parallel inputs for receiving parts of the instruction word in parallel, a plurality of registers spaced apart on the chip for receiving said parts of the instruction word in serial and providing parallel outputs to the parallel inputs of the logic arrays, and single conductor means on the chip for transferring in serial the parts of the instruction word into the plurality of registers.
Claim 8
Dependent Claim
25 words
In an electronic calculator according to claim 5, an instruction register located on said chip with the conductor means being connected to the instruction register.
Claim 9
Dependent Claim
28 words
In an electronic calculator according to claim 6, a read-only-memory on the chip and means for loading instruction words into the instruction register in parallel from the read-only-memory.
Claim 10
Dependent Claim
26 words
In an electronic calculator according to claim 6, the instruction register comprising a plurality of stages and means connecting the stages to provide a shift register.
Claim 11
Dependent Claim
279 words
In an electronic calculator: keyboard input means for entering numbers and operational commands into the calculator; display means for displaying multidigit numbers; electronic circuitry for performing calculations including large-scale-integrated semiconductor means, the circuitry including as part of the large scale integrated semiconductor means data memory means for storing numbers entered and intermediate and final results of calculations, the data memory having selectable input/output means, arithmetic means for receiving numbers from the data memory means, the arithmetic means performing calculations and coupling the results back to the memory means, a permanent store memory containing a large number of multibit instruction words for defining the operation of the calculator, the instruction words being read out of the permanent store memory one word at a time in bit parallel, a plurality of separate decoder arrays spaced from one another on the semiconductor means, the decoder arrays having parallel outputs connected to the arithmetic means and the selectable input/output means of the data memory means, the improvement comprising instruction register means included in said circuitry and connected to receive said instruction words from the permanent store memory in parallel, and including a plurality of stages connected in sequence to define a shift register, whereby the multibit instruction words may be shifted serially out of the instruction register means, separate register means associated with each of the plurality of separate decoder means, having input means to receive parts of the instruction words and parallel output means connected to inputs of the decoder means, and single conductor means connecting the instruction register means to the input means of the separate register means to transfer parts of the instruction words serially from the instruction register means.
Claim 12
Dependent Claim
279 words
In an electronic calculator: keyboard input means for entering numbers and operational commands into the calculator; display means for displaying multidigit numbers; electronic circuitry for performing calculations including large-scale-integrated semiconductor means, the circuitry including as part of the large scale integrated semiconductor means data memory means for storing numbers entered and intermediate and final results of calculations, the data memory having selectable input/output means, arithmetic means for receiving numbers from the data memory means, the arithmetic means performing calculations and coupling the results back to the memory means, a permanent store memory containing a large number of multibit instruction words for defining the operation of the calculator, the instruction words being read out of the permanent store memory one word at a time in bit parallel, a plurality of separate decoder arrays spaced from one another on the semiconductor means, the decoder arrays having parallel outputs connected to the arithmetic means and the selectable input/output means of the data memory means, the improvement comprising instruction register means included in said circuitry and connected to receive said instruction words from the permanent store memory in parallel, and including a plurality of stages connected in sequence to define a shift register, whereby the multibit instruction words may be shifted serially out of the instruction register means, separate register means associated with each of the plurality of separate decoder means, having input means to receive parts of the instruction words and parallel output means connected to inputs of the decoder means, and single conductor means connecting the instruction register means to the input means of the separate register means to transfer parts of the instruction words serially from the instruction register means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-03-23 | 1979-09-22 | 1980-03-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-03-23 | 1983-09-22 | 1984-03-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-03-23 | 1987-09-22 | 1988-03-23 | $7700.00 | Window Closed / Lapsed |