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US3944980A Expired / Lapsed US ⏱️ 0.0 years remaining

Electronic sequence control system

Assignee: Hurth Maschinen und Werkzeuge GmbH
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Filing: 1974-08-14
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Granted: 1976-03-16
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Expires: 1994-08-14
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Abstract

Abstract Electrical sequence control system. There is described an electrical sequence control system which is controlled according to a predetermined program by means of a switching circuit wherein the outputs of the binary counter are connected with n bits to the data inputs of the decoder and the address inputs of a multiplexer, the output of the latter being applied to one input of an AND-gate and the second input of said AND-gate being connected to a rectangular wave generator. The output of the AND-gate is connected to the input of the binary counter and the connection of the output of the multiplexer with the input of the binary counter acts as a return when one of the input signals at the multiplexer corresponds with the address input.

Inventors

  • 👤 Georg Riedmayr

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 21:05
CPC Classifications
G; G05; G05B; G05B19/00; G05B19/02; G05B19/04; G05B19/07

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 245 words
An electronic sequence control system for controlling a given sequence of operation, comprising: a binary counter having a plurality of output terminals, an input terminal and setting input terminal; a decoder having a plurality of input terminals electrically connected to said output terminals of said binary counter and a plurality of output terminals, said plurality of output terminals being connected to selected components in said operation to effect the performance of a desired task in said sequence of operation; a multiplexer having a plurality of first input terminals electrically connected to said output terminals of said binary counter, a plurality of second input terminals having electrical signals applied thereto in response to functions performed during said desired task, and a single output terminal, selected ones of said first input terminals controlling selected ones of said second input terminals to control which signal is to appear at said single output terminal; and an AND-gate having two input terminals and a single output terminal, one of said input terminals to said AND-gate being electrically connected to said single output terminal of said multiplexer, the other input terminal being connected to a pulse generator so that said AND-gate will supply a signal to said output terminal thereof only when a signal is present on both of said input terminals thereof, said output terminal of said AND-gate being connected to said input terminal to said binary counter to effect an advancement of said binary counter to the next level.
Claim 2
Dependent Claim 245 words
An electronic sequence control system for controlling a given sequence of operation, comprising: a binary counter having a plurality of output terminals, an input terminal and setting input terminal; a decoder having a plurality of input terminals electrically connected to said output terminals of said binary counter and a plurality of output terminals, said plurality of output terminals being connected to selected components in said operation to effect the performance of a desired task in said sequence of operation; a multiplexer having a plurality of first input terminals electrically connected to said output terminals of said binary counter, a plurality of second input terminals having electrical signals applied thereto in response to functions performed during said desired task, and a single output terminal, selected ones of said first input terminals controlling selected ones of said second input terminals to control which signal is to appear at said single output terminal; and an AND-gate having two input terminals and a single output terminal, one of said input terminals to said AND-gate being electrically connected to said single output terminal of said multiplexer, the other input terminal being connected to a pulse generator so that said AND-gate will supply a signal to said output terminal thereof only when a signal is present on both of said input terminals thereof, said output terminal of said AND-gate being connected to said input terminal to said binary counter to effect an advancement of said binary counter to the next level.
Claim 3
Dependent Claim 16 words
A control system according to claim 1, wherein said pulse generator is a rectangular wave generator.
Claim 4
Dependent Claim 84 words
A control system according to claim 1, wherein between said multiplexer and said AND-gate there is a timing device having two AND-input terminals, one input being energized by signals appearing at said single output terminal of said multiplexer, the other input being connected to said setting input terminal and energized by a set input signal to said binary counter for setting of the binary counter to a desired level, the output of said timing device being connected to said one input of said AND-gate.
Claim 5
Dependent Claim 23 words
A control system according to claim 1, wherein set input signals are selectively supplied to said setting input terminal of said binary counter.
Claim 6
Dependent Claim 32 words
A control system according to claim 4, wherein at least one output signal indicative of the performance of said desired task is connected to said set input terminal of said binary counter.
Claim 7
Dependent Claim 55 words
A control system according to claim 5, wherein a plurality of set input terminals are provided to said binary counter and are electrically connected to at least one output terminal of said decoder, said electrical connection including a diode between each of said plurality of set input terminals and said output terminal of said decoder.
Claim 8
Dependent Claim 23 words
A control system according to claim 4, wherein said plurality of output terminals of said decoder are electrically connected to a diode matrix.

References Cited (Backward Citations)

US3317894A Cited
US3541512A Cited
US3622990A Cited
US3719925A Cited
US3840752A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-03-16 1979-09-15 1980-03-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-03-16 1983-09-15 1984-03-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-03-16 1987-09-15 1988-03-16 $7700.00 Window Closed / Lapsed

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