Bridge-balance detection circuit

Claim 2

The combination of: a first bridge circuit having two output terminals, each at a different node of the bridge, and a second bridge circuit for sensing the condition of the first bridge circuit, said second bridge circuit including four arms and four transistors, each transistor having a conduction path and a control electrode for controlling the conductance of said conduction path, each conduction path forming a different arm of said second bridge circuit, said second bridge circuit having two input terminals at two opposite nodes of the bridge, one such terminal at the control electrodes of two transistors in one pair of adjacent arms of the bridge and the other terminal at the control electrodes of the two transistors in the other pair of adjacent arms of the bridge, one input terminal connected to one output terminal of said first bridge circuit and the other to the other output terminal of said first bridge, said second bridge circuit having also a pair of output terminals, one at the connection of the conduction paths of said one pair of adjacent arms and the other at the connection of the conduction paths of said other pair of adjacent arms.

Claim 3

The combination of claim 1, wherein said second bridge circuit comprises: two pairs of complementary-symmetry MOS type field-effect transistors interconnected as a pair of complementary-symmetry inverters, each pair of transistors connected gate electrode-to-gate electrode and drain electrode-to-drain electrode, the gate electrodes of one inverter serving as one input terminal and the gate electrodes of the other serving as the other input terminal, each drain electrode-to-drain electrode connection serving as an output terminal, and one transistor of each inverter connected at its source electrode to an operating voltage terminal and the other transistor of each inverter connected at its source electrode to a second operating voltage terminal.

Claim 4

The combination of claim 1, wherein said first bridge circuit is a Wheatstone bridge having upper and lower impedance arms, and said detection circuit further includes a potentiometer connected between two of the impedance arms of said Wheatstone bridge, said potentiometer having an arm connected to a reference voltage point for providing offset null and sensitivity adjustment of said first bridge.

Claim 5

A smoke detector comprising, in combination: four ionization chambers connected in a bridge between two operating voltage terminals, two in one current path between these terminals and the other two in a second current path between these terminals, the first chamber in the first path being closed to prevent the entry of smoke and the second chamber in the first path being open to permit the entry of smoke, the two chambers in the second path also being closed and open, respectively, but located in positions in the second path complementary to those of the chambers in the first path, the connection between the closed and open chamber in each path serving as an output terminal of said bridge; a detection circuit comprising two complementary symmetry MOS transistor inverters, each inverter comprising two transistors of complementary conductivity types, connected gate electrode-to-gate electrode and drain electrode-to-drain electrode, each inverter being connected at one source electrode to one of said operating voltage terminals and at its other source electrode to said other operating voltage terminal, one output terminal of said bridge being connected to the gate electrodes of one inverter, the other output terminals of said bridge being connected to the gate electrodes of said other inverter; and indicator means connected between the drain electrode connection of one inverter and the drain electrode connection of the other inverter.

Claim 6

A smoke detector comprising, in combination: four ionization chambers connected in a bridge between two operating voltage terminals, two in one current path between these terminals and the other two in a second current path between these terminals, the first chamber in the first path being closed to prevent the entry of smoke and the second chamber in the first path being open to permit the entry of smoke, the two chambers in the second path also being closed and open, respectively, but located in positions in the second path complementary to those of the chambers in the first path, the connection between the closed and open chamber in each path serving as an output terminal of said bridge; a detection circuit comprising two complementary symmetry MOS transistor inverters, each inverter comprising two transistors of complementary conductivity types, connected gate electrode-to-gate electrode and drain electrode-to-drain electrode, each inverter being connected at one source electrode to one of said operating voltage terminals and at its other source electrode to said other operating voltage terminal, one output terminal of said bridge being connected to the gate electrodes of one inverter, the other output terminals of said bridge being connected to the gate electrodes of said other inverter; and indicator means connected between the drain electrode connection of one inverter and the drain electrode connection of the other inverter.

Claim 7

The smoke detector of claim 4, which further includes: means for unbalancing said bridge in the absence of smoke to provide a quiescent condition, and offset null, and a sensitivity control, said bridge being unbalanced in sense opposite to that produced by the presence of smoke.

Claim 8

The smoke detector of claim 5, wherein said unbalancing means includes: a potentiometer having an arm connected to one of said voltage terminals, and a pair of ends, one connected to an electrode of the open chamber in one path and the other connected to an electrode of the closed chamber in the other path.

Claim 9

The smoke detector of claim 4, wherein said first and second inverters are provided in integrated circuit form upon a single substrate.

Claim 10

A bridge-balance detection circuit, for detecting the balance and imbalance of a bridge circuit having a differential output signal, indicative of the balance and imbalance conditions of the bridge comprising: first and second inverters each one of said inverters including serially connected P-channel and N-channel MOSFET transistors having interconnected gate electrodes connected to an individual one of a pair of input terminals, and interconnected drain electrodes connected to an individual one of a pair of output terminals, said P-channel transistors having source electrodes connected to a voltage source, said N-channel transistors having source electrodes connected to a voltage reference, said pair of input terminals being connected to said output signal of said bridge; and means for indicating the balance and imbalance of said bridge circuit, said indicating means having a pair of input terminals connected across said pair of output terminals of said first and second inverters.

Claim 11

A bridge-balance detection circuit, for detecting the balance and imbalance of a bridge circuit having a differential output signal, indicative of the balance and imbalance conditions of the bridge comprising: first and second inverters each one of said inverters including serially connected P-channel and N-channel MOSFET transistors having interconnected gate electrodes connected to an individual one of a pair of input terminals, and interconnected drain electrodes connected to an individual one of a pair of output terminals, said P-channel transistors having source electrodes connected to a voltage source, said N-channel transistors having source electrodes connected to a voltage reference, said pair of input terminals being connected to said output signal of said bridge; and means for indicating the balance and imbalance of said bridge circuit, said indicating means having a pair of input terminals connected across said pair of output terminals of said first and second inverters.

Claim 12

The bridge-balance detection circuit of claim 8, wherein said bridge circuit is a Wheatstone bridge, having two pairs of upper and lower arms, each of said arms including an impedance means; and said detection circuit further includes a potentiometer connected across the lower impedance arms of said Wheatstone bridge, said potentiometer having an arm connected to a reference voltage for providing an offset null and sensitivity adjustment of said bridge.