Digital speed control

Claim 2

A digital speed control for maintaining a motor vehicle at a preselected speed comprising: means for generating a first digital signal responsive to the actual speed of the vehicle; means for producing and storing a first digital number proportional to a preselected vehicle speed; means for generating a first digital reference clock pulse train; means for generating a second digital reference clock pulse train; first digital counter means clocked by said first digital signal responsive to the actual speed of the vehicle for a first portion of the period of said first reference clock pulse train, said first digital counter means being further clocked by said second reference clock pulse train for the remainder of said first reference clock pulse period; a digital comparator producing a digital error signal which rises to and remains at a preselected potential whenever the output of said first digital counter equals said first digital number proportional to said selected vehicle speed; and means for adjusting the speed of the vehicle in response to said digital error signal to maintain the preselected speed.

Claim 3

A digital speed control as claimed in claim 1 wherein the first digital signal responsive to the actual speed of the vehicle comprises a series of speed signal pulses having a pulse repetition frequency proportional to the speed of the vehicle.

Claim 4

A digital speed control as claimed in claim 1 wherein said second clock pulse train has a pulse repetition rate twice that of said first clock pulse train.

Claim 5

A digital speed control for maintaining a motor vehicle at a preselected speed comprising: means for generating a first digital signal responsive to the speed of the vehicle having a pulse repetition frequency proportional to the actual speed of the vehicle; means for producing and storing a first digital number proportional to a preselected vehicle speed; means for generating a first digital reference clock pulse train; means for generating a second digital reference clock pulse train; a first digital counter; means for clocking said first digital counter by said first digital speed signal for a first portion of the period of said first reference clock pulse train and for clocking said first digital counter by said second reference clock pulse train for the remainder of said first reference clock pulse train; a digital comparator producing an output which rises to and remains at a preselected potential whenever the output of said first digital counter equals the first digital number proportional to said preselected vehicle speed; means for resetting the output of said digital comparator at the beginning of each first reference clock pulse train period; means responsive to the output of said digital comparator producing a digital error signal; and means for adjusting the speed of the vehicle in response to said digital error signal to maintain the vehicle at said preselected speed.

Claim 6

A digital speed control for maintaining a motor vehicle at a preselected speed comprising: means for generating a first digital signal responsive to the speed of the vehicle having a pulse repetition frequency proportional to the actual speed of the vehicle; means for producing and storing a first digital number proportional to a preselected vehicle speed; means for generating a first digital reference clock pulse train; means for generating a second digital reference clock pulse train; a first digital counter; means for clocking said first digital counter by said first digital speed signal for a first portion of the period of said first reference clock pulse train and for clocking said first digital counter by said second reference clock pulse train for the remainder of said first reference clock pulse train; a digital comparator producing an output which rises to and remains at a preselected potential whenever the output of said first digital counter equals the first digital number proportional to said preselected vehicle speed; means for resetting the output of said digital comparator at the beginning of each first reference clock pulse train period; means responsive to the output of said digital comparator producing a digital error signal; and means for adjusting the speed of the vehicle in response to said digital error signal to maintain the vehicle at said preselected speed.

Claim 7

A digital speed control as claimed in claim 4 wherein: said digital error signal is a pulse width modulated square wave having a pulse width proportional to the difference in speed between the preselected speed and an actual vehicle speed lower than said preselected speed.

Claim 8

A digital speed control as claimed in claim 5 wherein the means responsive to the output of said digital comparator producing a pulse width modulated digital error signal comprises: means for producing a first voltage at times corresponding to the beginning of each first even reference clock pulse train period; means for inhibiting said first voltage in response to an output from said digital comparator; and means for inhibiting said first voltage at times corresponding to the beginning of each first odd reference clock pulse train period.

Claim 9

A digital speed control as claimed in claim 5 wherein the means responsive to the output of said digital comparator producing a pulse width modulated digital error signal comprises: a first resettable digital flip-flop having an output; means for setting the first flip-flop at times corresponding to the beginning of each first even reference clock pulse train period; means for resetting said first flip-flop in response to an output from said digital comparator; and means for resetting said first flip-flop at times corresponding to the beginning of each first odd reference clock pulse train period.

Claim 10

A digital speed control as claimed in claim 7 and further including: a second resettable digital flip-flop; a first AND gate, one input to said first AND gate being from the output of the first digital flip-flop, and the other input to said first AND gate being from the output of said second digital flip-flop; means for resetting the second flip-flop in response to a command to disengage said digital speed control; and means for setting the second flip-flop to engage said digital speed control.

Claim 11

A digital speed control as claimed in claim 8 wherein the command to disengage the system is in response to a braking command.

Claim 12

A digital speed control as claimed in claim 9 wherein the means for adjusting the speed of the vehicle in response to said digital error signal comprises positioning a throttle to vary the speed of the motor of said vehicle.