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US3940846A Expired / Lapsed US ⏱️ 0.0 years remaining

Scannable light emitting diode array and method

Assignee: Motorola Solutions Inc
•
Filing: 1973-12-14
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Granted: 1976-03-02
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Expires: 1993-12-14
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Abstract

Abstract There is disclosed a monolithic light display comprising a matrix of light emitting diodes in an integral structure which is scannable to produce an alpha numeric character display. Each of the light emitting diodes is electrically isolated from each other diode in a supporting carrier, with the cathodes of the diodes connected in a series of groups by address lines and anodes connected in an orthagonal plurality of groups by bit lines or column lines. A strobing format logic address system is provided for lighting the individual diodes to emission for producing an alpha numeric character. There is also disclosed a method of making the foregoing which comprises moat etching a semiconductor substrate of a first conductivity to form a plurality of mesas in an orthagonal pattern desired for the ultimate alpha numeric display. A region of the opposite conductivity is then produced on the moat etched surface of the substrate by diffusing a suitable dopant therein. The PN junction is thereby formed following the contour of the moat etched surface. A layer of material is then deposted upon the diffused surface and a supporting carrier deposited over the first layer. If the first layer is of conductive material, the supporting carrier is required to be of dielectric material. If the first layer is of a dielectric material, the carrier may be either dielectric, heat conductive, or electrically conductive material. The original substrate is then removed by lapping, etching or polishing to leave only the mesas in a dielectrically isolated array. Suitable electrical connections are made to the individual diodes to complete the display.

Inventors

  • 👤 Lawrence A. Grenon

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 01:50
CPC Classifications
H; H10; H10H; H10H29/00; H10H29/10; H10H29/14; H10H29/142

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 158 words
A process for the manufacture of a matrix of light emitting diodes, comprising the steps of: a. forming a plurality of mesas in an orthagonal pattern on a monocrystalline semiconductor substrate of a first conductivity; b. diffusing an opposite conductivity effecting material into the surface of said substrate to form a light emitting PN junction adjacent the surfaces of said mesas; c. forming a supporting carrier over the entire surface of said substrate; d. removing said monocrystalline substrate to separate said mesas into an orthagonal matrix of light emitting diodes electrically isolated in said supporting carrier and with the PN junction extending to the surface; e. depositing a dielectric layer over the surface of the ioslated photo diodes; f. placing a conductive layer thereon contacting said light emitting diodes in a plurality of rows; g. placing a second dielectric layer thereon; and h. placing a conductive layer thereon contacting said light emitting diodes in a plurality of columns.
Claim 2
Dependent Claim 158 words
A process for the manufacture of a matrix of light emitting diodes, comprising the steps of: a. forming a plurality of mesas in an orthagonal pattern on a monocrystalline semiconductor substrate of a first conductivity; b. diffusing an opposite conductivity effecting material into the surface of said substrate to form a light emitting PN junction adjacent the surfaces of said mesas; c. forming a supporting carrier over the entire surface of said substrate; d. removing said monocrystalline substrate to separate said mesas into an orthagonal matrix of light emitting diodes electrically isolated in said supporting carrier and with the PN junction extending to the surface; e. depositing a dielectric layer over the surface of the ioslated photo diodes; f. placing a conductive layer thereon contacting said light emitting diodes in a plurality of rows; g. placing a second dielectric layer thereon; and h. placing a conductive layer thereon contacting said light emitting diodes in a plurality of columns.
Claim 3
Dependent Claim 26 words
A process as recited in claim 1 wherein said monocrystalline substrate is selected from the group consisting of gallium arsenide, gallium phosphide and gallium arsenide phosphide.
Claim 4
Dependent Claim 15 words
A process as recited in claim 2 wherein said monocrystalline substrate is gallium arsenide phosphide.
Claim 5
Dependent Claim 22 words
A process as recited in claim 1 wherein said carrier substrate is selected from the group consisting of polycrystalline silicon and germanium.
Claim 6
Dependent Claim 15 words
A process as recited in claim 1 wherein said monocrystalline substrate is removed by lapping.
Claim 7
Dependent Claim 27 words
A process as recited in claim 1 and further including the step of depositing a dielectric layer upon said mesas prior to deposition of the supporting carrier.
Claim 8
Dependent Claim 28 words
A process as recited in claim 6 wherein said dielectric material is of a material selected from the group consisting of silicon dioxide, silicon nitride and aluminum oxide.

References Cited (Backward Citations)

US3381182A Cited
US3377513A Cited
US3509433A Cited
US3667004A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1979-03-02 1979-09-01 1980-03-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1983-03-02 1983-09-01 1984-03-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1987-03-02 1987-09-01 1988-03-02 $7700.00 Window Closed / Lapsed

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