US3934331A
Expired / Lapsed
US
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Method of manufacturing semiconductor devices
Assignee: Hitachi Ltd
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Filing: 1975-01-02
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Granted: 1976-01-27
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Expires: 1995-01-02
Abstract
Abstract A method of manufacturing semiconductor devices comprising a semiconductor element having a PN junction in which an N +-type region is formed in an N-type region constituting the PN junction and another N-type region is formed around the N +-type region and a metal layer is provided on the other N-type region and the N +-type region, thereby providing a mechanically and electrically improved ohmic contact to the semiconductor element.
Inventors
- 👤 Masayoshi Sugiyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 19:02
CPC Classifications
H; H10; H10P; H10P95/00; H10W; H10W20/00; H10W20/40
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
201 words
A method of manufacturing semiconductor devices, comprising the steps: a. forming a plurality of N-type high concentration regions in an N-type region whose surface is exposed to a first main surface of a semiconductor wafer, said N-type region forming at least one PN junction with an adjacent P-type region, each of said N-type high concentration regions being remote from one another; b. forming a metal layer over the entirety of said first main surface of said N-type region to form ohmic contact with said N-type high concentration regions; c. scribing grooves on a second main surface opposite to said main surface in a manner that said grooves in two directions are perpendicularly arranged to form substantially squares in which each of said N-type high concentration regions is confined and is smaller than the square in area so that each of said N-type high concentration regions is surrounded by the N-type region; d. applying a masking tape to said metal layer; e. applying a pressure to said semiconductor wafer on said masking tape for cutting off complete semiconductor elements defined by said scribing grooves; f. applying tension to said masking tape; and g. separating said complete semiconductor elements from said masking tape.
Claim 2
Independent Claim
201 words
A method of manufacturing semiconductor devices, comprising the steps: a. forming a plurality of N-type high concentration regions in an N-type region whose surface is exposed to a first main surface of a semiconductor wafer, said N-type region forming at least one PN junction with an adjacent P-type region, each of said N-type high concentration regions being remote from one another; b. forming a metal layer over the entirety of said first main surface of said N-type region to form ohmic contact with said N-type high concentration regions; c. scribing grooves on a second main surface opposite to said main surface in a manner that said grooves in two directions are perpendicularly arranged to form substantially squares in which each of said N-type high concentration regions is confined and is smaller than the square in area so that each of said N-type high concentration regions is surrounded by the N-type region; d. applying a masking tape to said metal layer; e. applying a pressure to said semiconductor wafer on said masking tape for cutting off complete semiconductor elements defined by said scribing grooves; f. applying tension to said masking tape; and g. separating said complete semiconductor elements from said masking tape.
Claim 3
Dependent Claim
35 words
A method according to claim 1 in which the impurity concentration of said N-type wafer is approximately 1 × 10 15 atoms/cm 3 and the impurity concentration of said N-type high concentration regions is 1
Claim 4
Dependent Claim
39 words
A method according to claim 1 in which each of said N-type high concentration regions is formed in such a manner that the widths of the portion of said N-type wafer viewed on said first main surface are larger
Claim 5
Independent Claim
210 words
A method of manufacturing semiconductor devices, comprising the steps of: a. forming an N-type high concentration region in an N-type region of a semiconductor wafer in a manner that a plurality of surfaces of said N-type region which are remote from one another are exposed to a first main surface of said semiconductor wafer, said N-type region forming at least one PN junction with an adjacent P-type region; b. forming a metal layer over the entirety of said first main surface of said N-type region to form ohmic contact with said N-type high concentration region; c. scribing grooves on a second main surface opposite to said main surface in a manner that said grooves in two directions are perpendicularly arranged to form substantially squares so that each of said N-type regions at said first main surface of said semiconductor wafer is divided into four fan-shaped portions and each fan shape portion being one of the four corners of said square; d. applying a masking tape to said metal layer; e. applying a pressure to said semiconductor wafer on said masking tape for cutting off complete semiconductor elements defined by said scribing grooves; f. applying tension to said masking tape; and g. separating said complete semiconductor elements from said masking tape.
Claim 6
Independent Claim
210 words
A method of manufacturing semiconductor devices, comprising the steps of: a. forming an N-type high concentration region in an N-type region of a semiconductor wafer in a manner that a plurality of surfaces of said N-type region which are remote from one another are exposed to a first main surface of said semiconductor wafer, said N-type region forming at least one PN junction with an adjacent P-type region; b. forming a metal layer over the entirety of said first main surface of said N-type region to form ohmic contact with said N-type high concentration region; c. scribing grooves on a second main surface opposite to said main surface in a manner that said grooves in two directions are perpendicularly arranged to form substantially squares so that each of said N-type regions at said first main surface of said semiconductor wafer is divided into four fan-shaped portions and each fan shape portion being one of the four corners of said square; d. applying a masking tape to said metal layer; e. applying a pressure to said semiconductor wafer on said masking tape for cutting off complete semiconductor elements defined by said scribing grooves; f. applying tension to said masking tape; and g. separating said complete semiconductor elements from said masking tape.
Claim 7
Dependent Claim
46 words
A method of according to claim 4 in which the impurity concentration of said N-type wafer is approximately 1 × 10 15 atoms/cm 3 and impurity concentration of said N-type high concentration region is 1 × 10 18 to 1 × 10 20 atoms/cm 3 .
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1979-01-26 | 1979-07-28 | 1980-01-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1983-01-26 | 1983-07-28 | 1984-01-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1987-01-26 | 1987-07-28 | 1988-01-27 | $7700.00 | Window Closed / Lapsed |