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US3930208A Expired / Lapsed US ⏱️ 0.0 years remaining

A-C signal processing circuits for compandors

Assignee: Nortel Networks Ltd
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Filing: 1974-08-29
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Granted: 1975-12-30
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Expires: 1994-08-29
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Abstract

Abstract An a-c signal processing circuit, for use in compandors, includes variolossers arranged in series. A network associated with each variolosser restricts the operation of each variolosser to a particular band of frequencies. Signals outside the band of frequencies are passed with a constant degree of loss by the variolosser. Each variolosser is controlled by a control circuit which is responsive to the amplitude envelope of signals having frequencies within the operational band of the associated variolosser. When the signal processing circuit is used to provide compression and expansion functions in a plural band compandor, phase shift introduced into signals having frequencies near the operational limits of one frequency restrictive means, in the compressor, is substantially corrected by complementary phase shift introduced in the expandor. Further, signal cancellation and reinforcement is avoided. Hence output signals from the compandor are of improved fidelity.

Inventors

  • 👤 James Douglas Winter
  • 👤 Mark Alexander Elder

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 18:12
CPC Classifications
H; H03; H03G; H03G7/00; H03G7/06; H03G9/00; H03G9/02; H03G9/12; H03G9/18; H04; H04B; H04B1/00; H04B1/62; H04B1/64

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 237 words
An alternating current signal processing circuit, for use in a compandor and havaing input and output ports, comprising: a plurality of variolossers, each having a variable gain characteristic; buffer amplifier means residing between the variolossers in the plurality of variolossers, for providing impedance isolation between the variolossers, the variolossers connected in tandem between the input and output ports via the buffer amplifier means; a filter network in combination with each variolosser, for limiting the variable gain characteristic of the variolosser to a mutually exclusive operational band of frequencies as determined by the stop band characteristic of the filter network, and providing a nearly constant gain characteristic for other frequencies as determined by the pass band impedance of the filter network; a separate control unit associated with each variolosser, for generating a control signal for controlling the associated variolosser, each control unit having an input, the inputs connected in common one with the other and to one of said ports, each control unit being responsive to alternating current signals having frequenciEs in the mutually exclusive band of frequencies of the variolosser associated therewith and appearing at the input of the control unit; whereby the relative dynamic range of the alternating current signals, of frequencies falling within the operational frequency band of each variolosser, is altered according to the response of the control units to the alternating current signals and the response of the variolossers to the control signals.
Claim 2
Dependent Claim 237 words
An alternating current signal processing circuit, for use in a compandor and havaing input and output ports, comprising: a plurality of variolossers, each having a variable gain characteristic; buffer amplifier means residing between the variolossers in the plurality of variolossers, for providing impedance isolation between the variolossers, the variolossers connected in tandem between the input and output ports via the buffer amplifier means; a filter network in combination with each variolosser, for limiting the variable gain characteristic of the variolosser to a mutually exclusive operational band of frequencies as determined by the stop band characteristic of the filter network, and providing a nearly constant gain characteristic for other frequencies as determined by the pass band impedance of the filter network; a separate control unit associated with each variolosser, for generating a control signal for controlling the associated variolosser, each control unit having an input, the inputs connected in common one with the other and to one of said ports, each control unit being responsive to alternating current signals having frequenciEs in the mutually exclusive band of frequencies of the variolosser associated therewith and appearing at the input of the control unit; whereby the relative dynamic range of the alternating current signals, of frequencies falling within the operational frequency band of each variolosser, is altered according to the response of the control units to the alternating current signals and the response of the variolossers to the control signals.
Claim 3
Dependent Claim 37 words
A signal processing circuit as defined in claim 1 in which the filter network having the lowest stop band characteristic includes means for limiting the conductance of the network in the upper portions of its passband characteristic.
Claim 4
Dependent Claim 125 words
An alternating current signal processing circuit as defined in claim 1 in which each filter network is a first order filter network having mutually distinct pass band and stop band characteristics and a transitional region therebetween having a predetermined slope characteristic common to each of the filter networks; and in which: each control unit includes a second order filter circuit having a pass band, a stop band and a transitional region therebetween having a slope greater than the predetermined slope of the transitional region of the associated first order filter network, and intersecting with the transitional region of the associated first order filter network, the control unit being responsive to alternating current signals passed by the second order filter circuit to provide the control signal.
Claim 5
Dependent Claim 149 words
A signal processing circuit as defined in claim 1, in which the variolossers each comprise: first and second current amplifiers having inputs for the application of balanced signals thereto so as to be driven in opposite phase by the signals to the variolosser, and responsive to the control current from the control unit whereby the operating points of the current amplifiers are controlled; first and second diode elements connected between an alternating current ground and the outputs of the first and second current amplifiers respectively, whereby the impedance of each diode element is determined by the current conducted therethrough; the filter network connected between the outputs of the first and second current amplifiers; and in which the buffer amplifier means includes: inputs connected to the outputs of the first and second current amplifiers, the processed output signals from the variolosser appearing at the output of the buffer amplifier means.
Claim 6
Dependent Claim 81 words
A signal processing circuit as defined in claim 4 in which each control unit comprises: a filter means having a passband characteristic substantially corresponding to the stop band of the filter network connected between the first and second current amplifiers; means for generating a control current substantially in response to the amplitude envelope of signals passed by the filter means; means for providing a minimum control current, to prevent the impedance of the diode elements for exceeding a certain maximum value.
Claim 7
Dependent Claim 144 words
A signal processing circuit as defined in claim 4 further comprising in combination with each variolosser; a first current source connected to the variolosser, for biasing said first and second current amplifiers to operate at a predetermined level of conduction in addition to the level of conduction at said operating points, as determined by the control unit; second and third current sources connected to the outputs of the first and second current amplifiers respectively, the second and third current sources conducting currents substantially in the amount of the predetermined level of conduction; whereby the first and second current amplifiers are maintained in substantially linear area of their operating characteristics, the current resulting from said predetermined level of conduction being isolated from the diode elements, to provide for linear amplification of those signals having frequencies outside of the frequency responsive range of the control unit.
Claim 8
Dependent Claim 47 words
A circuit as defined in claim 4 in which the filter network, connected with one of the variolossers, has a high passband characteristic, and includes limiting means for limiting to a degree the conductance of the network in the upper portion of its high pass band characteristic.
Claim 9
Dependent Claim 212 words
A signal processing circuit as defined in claim 1 in which the variolossers each comprise: first and second voltage amplifiers having inputs for the application of balanced signals thereto, so as to be driven in opposite phase by the signals applied to the variolosser, and responsive to a control voltage from the control unit whereby the operating points of the voltage amplifiers are controlled; first and second diode elements connected between a first alternating current ground and the outputs of the first and second voltage amplifiers respectively, whereby the impedance of each diode element is determined by the current conducted therethrough; first and second resistances connected between a second alternating current ground, of a different direct current potential than the first alternating current ground, and the first and second voltage amplifiers respectively, eacch resistance conducting substantially all the operational current of its associated voltage amplifier; the filter network connected between the outputs of the first and second voltage amplfiers; and in which the buffer amplifier means includes: an input connected to the junction between the first resistance and the first voltage amplifier, and an input connected to the junction between the second resistance and the second voltage amplifier, the processed signals from the variolosser appearing at the output of the buffer means.
Claim 10
Dependent Claim 84 words
A signal processing circuit as defined in claim 8 in which the control unit comprises: a filter means having a passband characteristic substantially corresponding to the stop band of the filter network connected between the outputs of the first and second voltage amplifiers; means for generating a control voltage substantially in response to the amplitude envelope of signals passed by the filter means; means for providing a minimum control voltage to prevent the impedance of the diode elements from exceeding a certain maximum value.
Claim 11
Dependent Claim 103 words
A signal processing circuit as defined in claim 8 further comprising: first and second current sources connected to the outputs of the first and second voltage amplifiers respectively, the current sources each conducting a certain current to cause the voltage amplifiers to operate at a predetermined level of conduction, in addition to the levels of conduction at said operating points as determined by the control unit, whereby the first and second voltage amplifiers are maintained in substantially linear areas of their operating characteristics, to provide for linear amplification of those signals having frequencies outside of the frequency responsive range of the control unit.
Claim 12
Dependent Claim 46 words
A circuit as defined in claim 8 in which the filter network, connected with one of the variolossers, has a high passband characteristic, and includes limiting means for limiting to a degree the conductance of the network in the upper portion of its high passband characteristic.
Claim 13
Dependent Claim 634 words
An alternating current signal processing circuit for providing a companding function for a circuit facility and comprising: a compressor portion including at least two balanced varioloser circuits, connected in tandem between an input port and an output port connected to the circuit facility, each variolosser circuit comprising: first and second current amplifiers, responsvie to a balanced alternating current signal applied between the inputs of the current amplifiers, and responsive to a control current; first and second diode elements connected between an alternating current ground and the outputs of the first and second current amplifiers respectively whereby the impedance of each diode element Is varied according to the current conduction therethrough; a buffer amplifier means having inputs connected to the outputs of the first and second current amplifiers, and having an output; means for providing a minimum control current to cause the first and second current amplifiers to conduct minimum operational currents in a linear region of their operating characteristics; means connected to the first and second current amplifiers for conducting currents substantially in the amounts of the minimum operational currents caused by said minimum control current whereby the impedances of the diode elements are unaffected by said minmum operational currents; a filter network connected between the outputs of the first and second current amplifiers, in one case the filter network having a low pass characteristic to provide a high band compressor function, in the other case the filter network having a higher pass characteristic to provide a lower band compressor function, adjacent in frequency to the high band compressor function; a control unit for providing the control current additively with said minimum control current, and having an input connected to said output port, the control unit providing the control current in response to the amplitude envelope of the alternating current signals having frequencies in the stop band of the filter network in the associated variolosser; and an expandor portion including balanced variolosser circuits of the same quantity as in the compressor portion, and connected in tandem between an innput port connected to an output of the circuit facility, and an output port, each variolosser circuit comprising: first and second voltage amplifiers, responsive to a balanced signal applied between the inputts of the voltage amplifiers, and responsive to a control voltage; first and second diode elements connected between a first alternating current ground and the outputs of the first and second voltage amplifiers respectively whereby the impedance of each diode element is varied according to the current conduction therethrough; first and second resistances connected between a second alternating current ground, of a different direct current potential than the first alternating current ground, and the first and second voltage amplifiers respectively, to conduct substantially all the operating current of the voltage amplifiers; buffer amplifier means having an input connected to the junction between the first resistance and the first voltage amplifier and an input connected to the junction between the second resistance and the section voltage amplifier, and having an output; means for abstracting certain current from the outputs of the first and second voltage amplifiers, to cause the voltage amplifiers to operate in linear areas of their operating characteristics; a filter network connected between the outputs of the first and second voltage amplifiers, the filter networks in the expandor portion being substantially identical in operating characteristics to the filter networks of said one and other cases in the compressor portion, thereby providing high-band and lower band expandor functions in the expandor portion; a control unit for providing the control voltage and having an input connected to the input port of the expandor portion, the control unit providing the control voltage in response to the amplitude envelope of the alternating current signals, having frequencies in the stop band of the filter network in the associated variolosser.
Claim 14
Dependent Claim 634 words
An alternating current signal processing circuit for providing a companding function for a circuit facility and comprising: a compressor portion including at least two balanced varioloser circuits, connected in tandem between an input port and an output port connected to the circuit facility, each variolosser circuit comprising: first and second current amplifiers, responsvie to a balanced alternating current signal applied between the inputs of the current amplifiers, and responsive to a control current; first and second diode elements connected between an alternating current ground and the outputs of the first and second current amplifiers respectively whereby the impedance of each diode element Is varied according to the current conduction therethrough; a buffer amplifier means having inputs connected to the outputs of the first and second current amplifiers, and having an output; means for providing a minimum control current to cause the first and second current amplifiers to conduct minimum operational currents in a linear region of their operating characteristics; means connected to the first and second current amplifiers for conducting currents substantially in the amounts of the minimum operational currents caused by said minimum control current whereby the impedances of the diode elements are unaffected by said minmum operational currents; a filter network connected between the outputs of the first and second current amplifiers, in one case the filter network having a low pass characteristic to provide a high band compressor function, in the other case the filter network having a higher pass characteristic to provide a lower band compressor function, adjacent in frequency to the high band compressor function; a control unit for providing the control current additively with said minimum control current, and having an input connected to said output port, the control unit providing the control current in response to the amplitude envelope of the alternating current signals having frequencies in the stop band of the filter network in the associated variolosser; and an expandor portion including balanced variolosser circuits of the same quantity as in the compressor portion, and connected in tandem between an innput port connected to an output of the circuit facility, and an output port, each variolosser circuit comprising: first and second voltage amplifiers, responsive to a balanced signal applied between the inputts of the voltage amplifiers, and responsive to a control voltage; first and second diode elements connected between a first alternating current ground and the outputs of the first and second voltage amplifiers respectively whereby the impedance of each diode element is varied according to the current conduction therethrough; first and second resistances connected between a second alternating current ground, of a different direct current potential than the first alternating current ground, and the first and second voltage amplifiers respectively, to conduct substantially all the operating current of the voltage amplifiers; buffer amplifier means having an input connected to the junction between the first resistance and the first voltage amplifier and an input connected to the junction between the second resistance and the section voltage amplifier, and having an output; means for abstracting certain current from the outputs of the first and second voltage amplifiers, to cause the voltage amplifiers to operate in linear areas of their operating characteristics; a filter network connected between the outputs of the first and second voltage amplifiers, the filter networks in the expandor portion being substantially identical in operating characteristics to the filter networks of said one and other cases in the compressor portion, thereby providing high-band and lower band expandor functions in the expandor portion; a control unit for providing the control voltage and having an input connected to the input port of the expandor portion, the control unit providing the control voltage in response to the amplitude envelope of the alternating current signals, having frequencies in the stop band of the filter network in the associated variolosser.
Claim 15
Dependent Claim 96 words
A signal processing circuit as defined in claim 12 in which the variolossers providing said lower band compressor and expandor functions include a high frequency impedance element in series with the outputs of each of the current and voltage amplfiers therein, whereby the constant high frequency attenuation of the lower band variolosser circuits for frequencies somewhat remote the stop band in the associated filter networks is to a degree restraineD, to maintain a disproportionately higher signal level in the circuit facility for signals having frequencies in the upper portion of the passband of the filter networks.

References Cited (Backward Citations)

US2054657A Cited
US3119077A Cited
US3795876A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-12-29 1979-06-30 1979-12-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-12-29 1983-06-30 1983-12-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-12-29 1987-06-30 1987-12-30 $7700.00 Window Closed / Lapsed

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