US3930147A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Time multiplexed digital filter
Assignee: Telecommunications Radioelectriques et Telephoniques SA TRT
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Filing: 1974-05-13
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Granted: 1975-12-30
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Expires: 1994-05-13
Abstract
Abstract A time multiplexed digital filter including a coefficient generator, a delay device, a multiplier, and an adder, having an AND-gate switch in the adder/delay device loop for controlling the recursive input to the adder.
Inventors
- 👤 Maurice Georges Bellanger
- 👤 Guy Pierre Lepagnol
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 08:52
CPC Classifications
H; H04; H04L; H04L25/00; H04L25/02; H04L25/03; H04L25/03006; H04L25/03012; H04L25/03019; H03; H03H; H03H17/00; H03H17/02; H03H17/0283; H03H17/0292
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
141 words
A digital filter comprising: input means for supplying a sequence of signals of predetermined frequency; coefficient generator means for supplying a sequence of predetermined coefficients; multiplier means having a first input connected to said input means, and a second input connected to said coefficient generator means, and an output having an output signal thereon representing the product of the signals on said first and said second inputs; delay means for producing a predetermined time delay, and having an input and an output; adding means having a first input connected to said output of said multiplier means and a second input connected to said output of said delay means, and having an output connected to said input of said delay means; and control means for controlling the connection between said output of said adding means and said input of said delay means.
Claim 2
Dependent Claim
141 words
A digital filter comprising: input means for supplying a sequence of signals of predetermined frequency; coefficient generator means for supplying a sequence of predetermined coefficients; multiplier means having a first input connected to said input means, and a second input connected to said coefficient generator means, and an output having an output signal thereon representing the product of the signals on said first and said second inputs; delay means for producing a predetermined time delay, and having an input and an output; adding means having a first input connected to said output of said multiplier means and a second input connected to said output of said delay means, and having an output connected to said input of said delay means; and control means for controlling the connection between said output of said adding means and said input of said delay means.
Claim 3
Dependent Claim
34 words
A digital filter as defined in claim 1, wherein said sequenc of signals has a frequence of K/T, and is derived from the time-multiplexing of K elementary sequences each having a frequency of 1/T.
Claim 4
Dependent Claim
54 words
A digital filter as defined in claim 2, wherein said sequenc of signals are encoded samples of K analog signals to be filtered, said coefficients are sample values of a predetermined filtering function to be applied to said analog signals, and said output of said adder producing encoded samples of the filtered K signals.
Claim 5
Dependent Claim
17 words
A digital filter as defined in claim 1, wherein said coefficient generator means comprises a shift register.
Claim 6
Dependent Claim
47 words
A digital filter as defined in claim 1, wherein said control means comprises and AND-gate having first and second inputs and an output, said first input being connected to said output of said adding means, and said output being connected to said input of said delay means.
Claim 7
Dependent Claim
58 words
A digital filter as defined in claim 5, wherein said control means further comprises an inverter gate having an input and an output and a control signal source, said control signal source being connected to said input of said inverter gate, and wherein said output of said inverter gate is connected to said second input of said AND-gate.
Claim 8
Dependent Claim
26 words
A digital filter as defined in claim 1, wherein said delay means comprises two discrete delay circuits, each of said circuits having an equal time delay.
Claim 9
Dependent Claim
22 words
A digital filter as defined in claim 1, wherein said delay means produces a delay differing from time T by an amount
Claim 10
Dependent Claim
47 words
A digital filter as defined in claim 1, wherein said adding means comprises a first and second adder, and wherein said delay means comprises first and second delay devices operatively associated with said first and second adders respectively for producing first and second predetermined different time delays.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-12-29 | 1979-06-30 | 1979-12-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-12-29 | 1983-06-30 | 1983-12-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-12-29 | 1987-06-30 | 1987-12-30 | $7700.00 | Window Closed / Lapsed |