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US3924233A Expired / Lapsed US ⏱️ 0.0 years remaining

Active-passive target detection system

Assignee: United States Department of the Navy
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Filing: 1969-04-10
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Granted: 1975-12-02
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Expires: 1989-04-10
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Abstract

Abstract An active-passive target detection system which includes two passive channels both of which are optical and detect and fuze on infrared energy radiated by the target aircraft. An active channel, which may be either radio frequency or optical, is also used which detects and fuzes on the doppler signal generated at intercept with the target aircraft. A logic circuit into which all channels feed serves to select the most effective channel or combination of channels for a given intercept situation.

Inventors

  • 👤 John J Nastronero
  • 👤 John C Billings

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 16:52
CPC Classifications
G; G01; G01S; G01S13/00; G01S13/86; F; F42; F42C; F42C13/00; F42C13/02; F42C13/023; F42C13/04

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 213 words
In an active-passive target detection system, the combination comprising: a. A first passive target detecting means for generating a first passive signal in response to a first predetermined geometrical encounter with the target, b. a second passive target detecting means for generating a second passive signal in response to a second predetermined geometrical encounter with the target, c. an active target detecting means for generating an active signal in response to said first predetermined geometrical encounter with the target, d. logic circuit means coupled to said first and second passive and active target detecting means and having an output. e. firing circuit means coupled to the output of said logic circuit means for generating a firing pulse in response to a signal received from said logic circuit means, f. said logic circuit means being responsive to the appearance and disappearance of a target signal in said second passive target detecting means during the persistence of a target signal from said first passive target detecting means to pass a signal to said firing circuit means, g. said logic circuit means being responsive to a signal appearing in said active target detecting means prior to the appearance of a signal in said first passive target detecting means to pass a signal to said firing circuit.
Claim 2
Dependent Claim 213 words
In an active-passive target detection system, the combination comprising: a. A first passive target detecting means for generating a first passive signal in response to a first predetermined geometrical encounter with the target, b. a second passive target detecting means for generating a second passive signal in response to a second predetermined geometrical encounter with the target, c. an active target detecting means for generating an active signal in response to said first predetermined geometrical encounter with the target, d. logic circuit means coupled to said first and second passive and active target detecting means and having an output. e. firing circuit means coupled to the output of said logic circuit means for generating a firing pulse in response to a signal received from said logic circuit means, f. said logic circuit means being responsive to the appearance and disappearance of a target signal in said second passive target detecting means during the persistence of a target signal from said first passive target detecting means to pass a signal to said firing circuit means, g. said logic circuit means being responsive to a signal appearing in said active target detecting means prior to the appearance of a signal in said first passive target detecting means to pass a signal to said firing circuit.
Claim 3
Dependent Claim 206 words
The active-passive target detection system of claim 1 wherein said logic circuit means includes; a. a memory circuit having an input coupled to said first passive target detecting means and having an output, b. a gate circuit having a first input coupled to said first passive target detecting means, a second input coupled to said active target detecting means and having an output, c. a first delay circuit means having an input coupled to said active target detecting means and having an output, D. a first OR gate circuit having a first input coupled to the output of said first delay circuit means, a second input coupled to said second passive target detecting means and having an output, e. an AND gate having a first input coupled to the output of said memory circuit, a second input coupled to the output of said first OR gate circuit and having an output, f. a second delay circuit having an input coupled to the output of said gate circuit and having an output, g. a second OR gate circuit having a first input coupled to the output of said second delay circuit, a second input coupled to the output of said AND gate circuit and having an output.
Claim 4
Dependent Claim 44 words
The target detecting system of claim 2 wherein said gate circuit is normally open and is turned off when a target signal appears in said first passive target detecting means prior to the appearance of a target signal in said active target detecting means.
Claim 5
Dependent Claim 48 words
The target detecting system of claim 2 wherein a signal received in said active target detecting means during the memory time of said memory circuit will be coupled through said first delay circuit means to said first OR gate circuit causing an output signal from said logic circuit.

References Cited (Backward Citations)

US3269314A Cited
US3076961A Cited
US3155971A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-12-01 1979-06-02 1979-12-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-12-01 1983-06-02 1983-12-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-12-01 1987-06-02 1987-12-02 $7700.00 Window Closed / Lapsed

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