Facsimile carrier detect circuit

Claim 2

A detector circuit for generating an output control signal in response to a long duty cycle start control signal comprising first and second comparators each having a pair of input terminals and an output terminal, one of the input terminals on each comparator being biased to establish a threshold switching level for each comparator, each comparator generating a first output voltage when a signal applied to the other input terminal is above said switching level and a second output voltage when the applied signal is below said switching level, said other input terminal of said first comparator adapted to receive said start control signal, charge control means for coupling the output terminal of said first comparator to the other input terminal of said second comparator, a capacitor coupled to said other input terminal of said second comparator, the charge on said capacitor being controlled by said charge control means, said charge control means comprising at least two parallel paths between said output terminal of said first comparator and the other input terminal of said comparator, each path including a resistor and a diode, said diodes being poled in opposite directions, and means for controlling said charge control means to charge said capacitor at a first rate in response to said first output voltage from said first comparator and to discharge said capacitor at a second rate in response to said second output voltage from said first comparator, whereby a predetermined time after receipt of said start control signal the signal at the other input terminal of said second comparator reaches its switching level so that the second comparator generates said output control signal.

Claim 3

The combination recited in claim 1 wherein said charge control means comprises three parallel paths, each containing a resistor and a diode, a pair of said paths having diodes poled in the same direction and opposite to the diode in said other path.

Claim 4

The combination recited in claim 1 wherein the switching level of said first and second comparators are different.

Claim 5

The combination recited in claim 1 further including means responsive to the output of said second comparator to change said switching level of said first comparator after receipt of said start control sigNal.

Claim 6

The combination recited in claim 2 wherein said output terminal of said first comparator is connected to one of said pair of paths having the similarly poled diodes to render said one path inoperative after receipt of said start control signal.

Claim 7

A detector circuit for providing an output signal a predetermined time after receipt of an input signal having an initial predetermined characteristic and for thereafter maintaining said output signal while said input signal remains within a predetermined range, said predetermined characteristic comprising repetitive periods of a first level component above a threshold level within said range and a second level component of relatively short duration outside said range, said detector circuit comprising switching means generating a first signal when receiving an input signal above said threshold level and a second signal when receiving an input signal below said threshold level, a capacitor, means responsive to a preselected voltage on said capacitor for providing said output signal, charge control means responsive to said first signal to charge said capacitor at a first rate and responsive to said second signal to discharge said capacitor at a second rate, the net result of the charging and discharging of said capacitor being to change the voltage on said capacitor to said preselected voltage said predetermined time after receipt of an input signal having said predetermined characteristic, said charge control means comprising first and second parallel paths coupled intermediate said capacitor and said switching means, each of said paths including a resistor and a diode, said diodes being poled in opposite directions to become alternately conductive or non-conductive, respectively, in response to said first and second signals, wherein said input signal includes information signals and control signals, said information signals varying in said range bounded by a first potential and a second potential, and said switching means comprises comparator means having a pair of input terminals and an output terminal, one of said input terminals coupled to receive said input signal, first bias means for initially biasing the other input terminal of said comparator means to said threshold level, and second bias means responsive to said output signal for biasing said other input terminal to a third potential outside said range.

Claim 8

A detector circuit for providing an output signal a predetermined time after receipt of an input signal having an initial predetermined characteristic and for thereafter maintaining said output signal while said input signal remains within a predetermined range, said predetermined characteristic comprising repetitive periods of a first level component above a threshold level within said range and a second level component of relatively short duration outside said range, said detector circuit comprising switching means generating a first signal when receiving an input signal above said threshold level and a second signal when receiving an input signal below said threshold level, a capacitor, means responsive to a preselected voltage on said capacitor for providing said output signal, charge control means responsive to said first signal to charge said capacitor at a first rate and responsive to said second signal to discharge said capacitor at a second rate, the net result of the charging and discharging of said capacitor being to change the voltage on said capacitor to said preselected voltage said predetermined time after receipt of an input signal having said predetermined characteristic, said charge control means comprising first and second parallel paths coupled intermediate said capacitor and said switching means, each of said paths including a resistor and a diode, said diodes being poled in opposite directions to become alternately conductive or non-conductive, respectively, in response to said first and second signals, wherein said input signal includes information signals and control signals, said information signals varying in said range bounded by a first potential and a second potential, and said switching means comprises comparator means having a pair of input terminals and an output terminal, one of said input terminals coupled to receive said input signal, first bias means for initially biasing the other input terminal of said comparator means to said threshold level, and second bias means responsive to said output signal for biasing said other input terminal to a third potential outside said range.