Minimal redundancy encoding method and means

Claim 1

Apparatus for generating a set of electrical signals representing a minimal redundancy code from inputted electrical signals representing a sequence position of a current input character in a character set, comprising a clock device generating electrical timing signals, a scanable article in said apparatus formed with a sequence of bit positions, in which each bit position is settable to one of two electrical states, one electrical state being an inner vertex state and a second electrical state being a sink state, wherein the sequence of said electrical states in the bit positions of said scanable article can indicate a left list scan of minimal redundancy binary tree in which the path vectors represent the output character codes, means for sensing the electrical state of each bit position in said scanable article sequentially from a starting bit position under control of said electrical timing signals, means for counting the sink states electrically sensed by said sensing means to generate a sink count, a register device receiving a ''''zero'''' bit electrical state in a low-order bit position when an inner vertex state is detected by said sensing means to thereby increase the length of a current path vector in said register device by one bit position, means for detecting the electrical state of the bit positions in the current path vector in said register device, beginning with its lowest-order path vector bit position, when a sink state is detected by said sensing means, means for deleting from the current path vector in said register device each electrical ''''one'''' bit state found by said detecting means to be contiguous from the lowest-order bit position in the current path vector, the path vector remaining in said register device having an electrical ''''zero'''' state in its lowest-order bit position, means for changing the electrical state of the lowest-order bit position in said path vector in said register device to an electrical ''''one'''' bit state, and means for outputting the path vector setting in said register device when the sink-count in said counting means reaches an electrical state controlled by the sequence position for the current input character.