Operational transconductance amplifier

Claim 2

In combination: a supply of first and second operating potentials; an input amplifier having an input circuit for application of input signal and having a balanced output circuit for supplying first and second currents which vary in push-pull relationship to each other responsive to said input signal; first and second transistors having emitter electrodes connected to said first operating potential, having their respective base electrodes connected to the balanced output circuit of said input amplifier to conduct respectively said first current and said second current, and having collector electrodes; a current mirror amplifier having an input terminal to which said first transistor collector electrode is direct current conductively coupled, having a common terminal connected to said second operating potential, and having an output terminal to which said second transistor collector electrode is direct current conductively coupled; and first and second conductive means, said first conductive means connecting said first transistor base electrode to said second operating potential, said second conductive means connecting said second transistor base electrode to said second operating potential, for applying a sustained forward bias to the base electrodes of the first and second transistors whenever one or both of said first and said second currents is zero-valued or nearly so.

Claim 3

The combination set forth in claim 1 wherein said input amplifier comprises a pair of emitter-coupled further transistors.

Claim 4

The combination set forth in claim 1 having therein means connected to the emitter-electrodes of said further transistor for modulating their combined emitter currents.

Claim 5

In an operational transconductance amplifier comprising first and second transistors connected in emitter-coupled differential amplifier configuration to accept a first input signal between their respective base electrodes, means for applying a common-mode current varied in proportion with a second input signal to the joined emitter electrodes of said first and said second transistors, a first and a second current mirror amplifiers having their respective input ports connected to provide active collector loads respectively to said first transistor and to said second transistor and a third current mirror amplifier having its input port connected to the output port of said first current mirror amplifier and having its output port connected to the output port of said second current mirror amplifier at a point from which an output signal proportional to the product of said first signal and said common mode current is provided, the improvement comprising: a source of first and second auxIliary bias currents in fixed proportion to each other applied respectively to the input port of said first current mirror amplifier and to the input port of said second current mirror amplifier, said fixed proportion such that said first auxiliary bias current is substantially equal to said second auxiliary bias current multiplied by the current gain of said second current mirror amplifier divided by the current gain of said first current mirror amplifier and further divided by the current gain of said third current mirror amplifier.

Claim 6

In an operational transconductance amplifier comprising first and second transistors connected in emitter-coupled differential amplifier configuration to accept a first input signal between their respective base electrodes, means for applying a common-mode current varied in proportion with a second input signal to the joined emitter electrodes of said first and said second transistors, a first and a second current mirror amplifiers having their respective input ports connected to provide active collector loads respectively to said first transistor and to said second transistor and a third current mirror amplifier having its input port connected to the output port of said first current mirror amplifier and having its output port connected to the output port of said second current mirror amplifier at a point from which an output signal proportional to the product of said first signal and said common mode current is provided, the improvement comprising: a source of first and second auxIliary bias currents in fixed proportion to each other applied respectively to the input port of said first current mirror amplifier and to the input port of said second current mirror amplifier, said fixed proportion such that said first auxiliary bias current is substantially equal to said second auxiliary bias current multiplied by the current gain of said second current mirror amplifier divided by the current gain of said first current mirror amplifier and further divided by the current gain of said third current mirror amplifier.

Claim 7

The improvement as set forth in claim 4 wherein said source comprises means for supplying bias currents at a level which is a small fraction of the quiescent input currents normally present at the input ports of said first and second current mirror amplifiers.

Claim 8

The improvement set forth in claim 4 wherein said source of auxiliary first and second bias currents in fixed proportion to each other comprises: a source of bias potential and first and second resistive elements respectively connecting the input port of said first current mirror amplifier and the input port of said second current mirror amplifier each to said source of bias potential, the ratio of the resistance of said first resistive element to the resistance of said second resistive element being in a ratio substantially the inverse of said fixed proportion of said first auxiliary bias current to said second auxiliary bias current.

Claim 9

The improvement set forth in claim 6 wherein: third and fourth transistors have respective principal conduction paths comprising said first resistive element and said second resistive element, respectively, and have control electrodes together with: means for applying a potential to the joined control electrodes of said third and said fourth transistors to cause their principal conduction paths to supply said first and said second auxiliary bias currents in said fixed proportion.