Method and apparatus for predictive control

Claim 3

The method according to claim 1 and further including the step of selecting a control signal associated with a faster variation of the control signal prior to the first test run and providing said control signal to said controlled system if after the first two test runs said control signal associated with the faster variation results in a smaller extreme value of the control error vector magnitude.

Claim 4

The method according to claim 2 wherein said control signal associated with a faster variation is selected as a function of the sign of the control error position and at least one of the the derivatives of said error position with respect to time.

Claim 5

Apparatus for carrying out a predictive control in a system using a control loop model which reacts considerably faster than the controlled system and in which two opposed constant control signals are provided which can be selectively activated as inputs to the controlled system and the control system control loop model comprising: a. a sample and hold means having as its inputs the components of the actual control error vector and adapted to store said inputs and provide them as outputs; b. means for coupling said outputs to said control system model as initial values; c. first means for selectively coupling the first and second opposed control signals to said control loop model; d. a plurality of squaring means, one being associated with each component output of said control loop model; e. summing means having the outputs of each of said squaring means as inputs; f. an extreme value detector coupled to the output of said summing means; g. first and second storage means; h. second means for selectively coupling the output of said summing means to said first and second storage means; i. a stepping device including a clock for sequEntially operating said sample and hold element, said means for coupling said first and second signals, and said means for coupling the output of said summing means, said stepping device arranged to advance in response to the output signals of one of a clock and said extreme value detector.

Claim 6

Apparatus for carrying out a predictive control in a system using a control loop model which reacts considerably faster than the controlled system and in which two opposed constant control signals are provided which can be selectively activated as inputs to the controlled system and the control system control loop model comprising: a. a sample and hold means having as its inputs the components of the actual control error vector and adapted to store said inputs and provide them as outputs; b. means for coupling said outputs to said control system model as initial values; c. first means for selectively coupling the first and second opposed control signals to said control loop model; d. a plurality of squaring means, one being associated with each component output of said control loop model; e. summing means having the outputs of each of said squaring means as inputs; f. an extreme value detector coupled to the output of said summing means; g. first and second storage means; h. second means for selectively coupling the output of said summing means to said first and second storage means; i. a stepping device including a clock for sequEntially operating said sample and hold element, said means for coupling said first and second signals, and said means for coupling the output of said summing means, said stepping device arranged to advance in response to the output signals of one of a clock and said extreme value detector.

Claim 7

Apparatus according to claim 4 wherein said extreme value detector includes differentiating means coupled to the output of said summing means and a limit detector having its input coupled to the output of said differentiating means.

Claim 8

Apparatus according to claim 4 and further including means for supplying said opposed signal as a function of the sign of the control error position and a derivative of said position error with respect to time.

Claim 9

Apparatus according to claim 4 wherein said first and second means for selectively coupling comprise semiconductor switches.

Claim 10

Apparatus according to claim 4 wherein said stepping means comprises a plurality of stages, each enabled by a preceeding stage, and reset by a following stage and coupled to be set, when enabled by one of said clock and said extreme value detector the stages further being coupled as follows: a. a first stage coupled to be set by a last stage and providing its output to operate the sample and hold circuit and initiate a clock pulse from said clock; b. a second stage coupled to be set by said clock and having its output coupled to initialize the control system model and to initiate a clock pulse; c. a third stage coupled to be set by said clock and having its output coupled to said first means to cause said first opposed control signal to be provided to said control model and to couple the output of said extreme value detector to said stepping device; d. a fourth stage coupled to be set by said extreme value detector and providing its output to said second means to cause the output of said summing means to be provided to said first storage means and to initiate a clock pulse; e. a fifth stage coupled to be set by said clock and having its output coupled to re-initialize said control system model and to initiate a clock pulse; f. a sixth stage responsive to be set by said clock and providing its output to said first means to cause the second opposed control signal to be provided to said control loop model and to couple the output of said extreme value detector to said stepping device; g. a seventh stage coupled to be set by the output of said extreme value detector and providing its output to said second means to cause the output of said summing means to be provided said second storage means and to initiate a clock pulse; h. an eight stage coupled to be set by said clock and having its output coupled to reinitialize said control loop model; i. a comparator having as inputs the outputs of said first and second storage means; j. ninth and thirteenth stages enabled respectively by the output of said comparator and the inverse of said output, each coupled to be set, when enabled, by said clock and having their respective outputs coupled to said first means with the output of said ningh stage being arranged to cause said first control signal and the output of said thirteenth stage to cause said second control signal to be provided to said control loop model and each having their outputs coupled to initiate a clock pulse; k. tenth and fourteenth stages coupled when enabled, by a respective one of said ninth or thirteenth stages to be set by said clock each having their outputs arranged to couple said extreme value detector to said stepping device, said tenth stage having its output coupled to cause said first means to provide said second control signal to said control loop model, and said fourteenth stage being coupled to cause said first means to provide said first control signal to said control loop model;

Claim 11

Apparatus for carrying out a predictive control in a system using a control loop model which reacts considerably faster than the control system and in which two opposed constant control signals are provided which can be selectively activated as inputs to the controlled system and the control loop model comprising: a. means for developing the components of an actual control vector error by finding the difference of the controlled system state vector and a desired state vector; b. means having said error vector components as inputs for sampling and holding said error vector components; c. a control loop model having the component outputs of said sample and hold means as an initialzing inputs and adapted to provide component outputs; d. means to selectively couple first and second opposed control signals to said control loop model; e. a plurality of squaring means, one being provided for each component of the state vector, coupled to respective state vector component outputs of said control loop model; f. means for summing the outputs of said squaring means; g. an extreme value detector coupled to the output of said summing means; h. first and second storage means; i. means for selectively coupling the output of said summing means to said first and second storage means; j. a comparator having the outputs of said first and second storage means as inputs; k. a clock; l. stepping means having a plurality of stages coupled for operating said sample and hold means, initializing said control loop model, coupling said summing means outputs to said storage means, coupling the output of said extreme value detector to said stepping means, and for coupling said first and second opposed signals to said control loop model, and further having outputs for initiating said clock to produce clock pulses, said stepping means being responsive at predetermined stages to a pulse output from said clock, the output of said extreme value detector and the output of said comparator; m. said stepping device being arranged to sequentially operate said above described means to carry out at least two test runs and further including outputs operable at the end of said test run for coupling one or the other of the two opposed control signals to the controlled system.

Claim 12

Apparatus for carrying out a predictive control in a system using a control loop model which reacts considerably faster than the control system and in which two opposed constant control signals are provided which can be selectively activated as inputs to the controlled system and the control loop model comprising: a. means for developing the components of an actual control vector error by finding the difference of the controlled system state vector and a desired state vector; b. means having said error vector components as inputs for sampling and holding said error vector components; c. a control loop model having the component outputs of said sample and hold means as an initialzing inputs and adapted to provide component outputs; d. means to selectively couple first and second opposed control signals to said control loop model; e. a plurality of squaring means, one being provided for each component of the state vector, coupled to respective state vector component outputs of said control loop model; f. means for summing the outputs of said squaring means; g. an extreme value detector coupled to the output of said summing means; h. first and second storage means; i. means for selectively coupling the output of said summing means to said first and second storage means; j. a comparator having the outputs of said first and second storage means as inputs; k. a clock; l. stepping means having a plurality of stages coupled for operating said sample and hold means, initializing said control loop model, coupling said summing means outputs to said storage means, coupling the output of said extreme value detector to said stepping means, and for coupling said first and second opposed signals to said control loop model, and further having outputs for initiating said clock to produce clock pulses, said stepping means being responsive at predetermined stages to a pulse output from said clock, the output of said extreme value detector and the output of said comparator; m. said stepping device being arranged to sequentially operate said above described means to carry out at least two test runs and further including outputs operable at the end of said test run for coupling one or the other of the two opposed control signals to the controlled system.