US3920484A
Expired / Lapsed
US
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Method of manufacturing semiconductor device
Assignee: Hitachi Ltd
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Filing: 1973-12-04
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Granted: 1975-11-18
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Expires: 1993-12-04
Abstract
Abstract A method of manufacturing a metal-insulator-semiconductor fieldeffect transistor and a bipolar transistor within an identical semiconductor chip. At a part of a semiconductor layer whose impurity concentration is low and uniform, the collector region of the bipolar transistor is formed as has an impurity concentration higher than that of the semiconductor layer. The base region and the emitter region of the bipolar transistor are respectively formed within the collector region. In the low impurity concentration-semiconductor layer, which is made a channel-forming region of the field-effect transistor, source and drain regions of the field-effect transistor are respectively formed.
Inventors
- 👤 Setsuo Ogura
- 👤 Naonobu Sato
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 20:09
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/40; H10D84/401; H10D84/01; H10D84/0107; H10D84/0109; H10D84/02; H10D84/03; H10D84/038
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
198 words
A method of manufacturing a semiconductor device comprising the steps of: a. providing a semiconductor substrate of a first conductivity type, at least a portion of which has a substantially uniform impurity concentration extending from a first surface to a prescribed depth therefrom; b. forming, in a selected first portion of the substantially uniform impurity concentration portion of said substrate, a collector region by introducing impurities of a second conductivity type, opposite said first conductivity type, into said selected first portion of the substrate; c. forming a base region in said collector region by introducing impurities of said first conductivity type into a prescribed portion of said collector region; d. forming an emitter region in said base region by introducing impurities of said second conductivity type into a predetermined portion of said base region; and e. forming respective source and drain regions of a field-effect transistor within a selected second portion of the substantially uniform impurity concentration portion of said substrate, spaced apart from the first portion thereof, by introducing impurities of said second conductivity type into respective surface portions of said selected second portion of said substrate, said substrate constituting a channel-forming region of said field-effect transistor.
Claim 2
Independent Claim
198 words
A method of manufacturing a semiconductor device comprising the steps of: a. providing a semiconductor substrate of a first conductivity type, at least a portion of which has a substantially uniform impurity concentration extending from a first surface to a prescribed depth therefrom; b. forming, in a selected first portion of the substantially uniform impurity concentration portion of said substrate, a collector region by introducing impurities of a second conductivity type, opposite said first conductivity type, into said selected first portion of the substrate; c. forming a base region in said collector region by introducing impurities of said first conductivity type into a prescribed portion of said collector region; d. forming an emitter region in said base region by introducing impurities of said second conductivity type into a predetermined portion of said base region; and e. forming respective source and drain regions of a field-effect transistor within a selected second portion of the substantially uniform impurity concentration portion of said substrate, spaced apart from the first portion thereof, by introducing impurities of said second conductivity type into respective surface portions of said selected second portion of said substrate, said substrate constituting a channel-forming region of said field-effect transistor.
Claim 3
Dependent Claim
107 words
A method according to claim 1, wherein step (a) comprises the steps of: a1. forming a buried region of said second conductivity type in a first semiconductor substrate layer of said first conductivity type, by introducing impurities of said second conductivity type in a surface portion of said first semiconductor substrate layer; and a2. epitaxially growing a second semiconductor substrate layer of said first conductivity type on the surface of said first semiconductor substrate layer, said second layer having a substantially uniform impurity concentration therethrough; said first and second semiconductor substrate layers constituting said substrate and said selected first portion of said substrate overlying said buried region.
Claim 4
Dependent Claim
24 words
A method according to claim 2, wherein said buried region is formed to have an impurity concentration higher than that of said collector region.
Claim 5
Dependent Claim
94 words
A method according to claim 2, wherein said step (b) comprises: b1. selectively introducing impurities of said second conductivity type into said second semiconductor substrate layer at said selected first portion thereof, to a prescribed depth, less than the thickness of said second semiconductor substrate layer, to form an initial collector region; and b2. heating the resulting structure to diffuse impurities from said initial collector region and said buried region into said second semiconductor substrate layer toward each other, to form a collector region which extends to and is contiguous with said buried region.
Claim 6
Dependent Claim
15 words
A method according to claim 1, wherein steps (d) and (e) are carried out simultaneously.
Claim 7
Dependent Claim
41 words
A method according to claim 2, wherein step (a) further includes the step of a3. forming a buried region of said first conductivity type in the portion of said first semiconductor layer surrounding the buried region of said second conductivity type.
Claim 8
Dependent Claim
31 words
A method according to claim 1, wherein said collector region is formed to have an impurity concentration relatively higher than that of said substantially uniform impurity concentration portion of said substrate.
Claim 9
Independent Claim
151 words
A method of manufacturing a semiconductor device comprising the steps of: a. providing a semiconductor substrate of a first conductivity type at least a portion of which has a substantially uniform impurity distribution therethrough; b. implanting ions of a second conductivity type impurity into a selected first portion of said semiconductor substrate to form a semiconductor collector region of a bipolar transistor, said collector region having an impurity concentration higher than that of said semiconductor substrate; c. forming a semiconductor base region of said first conductivity type within said collector region; d. forming a semiconductor emitter region of said second conductivity type in said base region; and e. forming respective semiconductor source and drain regions of said second conductivity type of a field-effect transistor within a selected second portion of said semiconductor substrate, spaced apart from said first portion thereof, said semiconductor substrate constituting a channel-forming region of said field-effect transistor.
Claim 10
Independent Claim
151 words
A method of manufacturing a semiconductor device comprising the steps of: a. providing a semiconductor substrate of a first conductivity type at least a portion of which has a substantially uniform impurity distribution therethrough; b. implanting ions of a second conductivity type impurity into a selected first portion of said semiconductor substrate to form a semiconductor collector region of a bipolar transistor, said collector region having an impurity concentration higher than that of said semiconductor substrate; c. forming a semiconductor base region of said first conductivity type within said collector region; d. forming a semiconductor emitter region of said second conductivity type in said base region; and e. forming respective semiconductor source and drain regions of said second conductivity type of a field-effect transistor within a selected second portion of said semiconductor substrate, spaced apart from said first portion thereof, said semiconductor substrate constituting a channel-forming region of said field-effect transistor.
Claim 11
Dependent Claim
65 words
A method according to claim 8, wherein said step (a) comprises the steps of: a1. forming a buried region of said second conductivity type in a semiconductor substrate of said first conductivity type at said selected first portion of said substrate; and a2. expitaxially growing a semiconductor layer of said first conductivity type and a substantially uniform impurity concentration on the surface of said substrate.
Claim 12
Dependent Claim
44 words
A method according to claim 9, further including the step of a3. forming a buried layer of said first conductivity type and a higher impurity concentration than said substrate in the surface of said substrate surrounding said buried region, prior to said step (a2).
Claim 13
Dependent Claim
38 words
A METHOD ACCORDING TO CLAIM 8. WHEREIN SAID STEP (B) COMPRISES THE STEPS OF B1. SELECTIVELY FORMING AN INSULATING MASK LAYER ON THE SURFACE OF SAID SEMICONDUCTOR SUBSTRATE, EXPOSING THE SURFACE THEREOF AT SAID SELECTED FIRST PORTION, AND
Claim 14
Dependent Claim
91 words
A method according to claim 9, wherein said step (b) comprises the steps of b1. selectively introducing impurities of said second conductivity type into said semiconductor layer at said selected first portion thereof, to a prescribed depth, less than the thickness of said semiconductor layer to form an initial collector region; and b2. heating the resulting structure to diffuse impurities from said initial collector region anD said buried region into said semiconductor layer toward each other, to form a collector region which extends to and is contiguous with said buried region.
Claim 15
Dependent Claim
55 words
A method according to claim 12, wherein said step (b1) comprises the steps of: b1-1. selectively forming an insulating masking layer on the surface of said semiconductor layer, exposing the surface thereof at said selected first portion, and b1-2. implanting ions of said second conductivity type into said semiconductor layer, to form said collector region.
Claim 16
Dependent Claim
16 words
A method according to claim 8, wherein said steps (d) and (e) are carried out simultaneously.
Claim 17
Dependent Claim
41 words
A method according to claim 14, further comprising the step of forming an insulating film on the surface of said substrate and providing both a gate electrode thereon and electrode contacts for said source, drain, emitter, base and collector regions therethrough.
Claim 18
Dependent Claim
44 words
A method according to claim 13, further including the step of (a3) forming a buried layer of said first conductivity type and a higher impurity concentration than said substrate in the surface of said substrate surrounding said buried region, prior to said step (a2).
References Cited (Backward Citations)
US3749610A
Cited
US3756861A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-11-17 | 1979-05-19 | 1979-11-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-11-17 | 1983-05-19 | 1983-11-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-11-17 | 1987-05-19 | 1987-11-18 | $7700.00 | Window Closed / Lapsed |