Wide dynamic range amplifier system with slew rate control

Claim 1

A wide dynamic range automatic high-speed gain ranging amplifier system comprising a plurality of amplifier stages, each stage having a predetermined gain, a respective input circuit and a respective output circuit, the amplifiers being coupled in cascade relationship whereby the respective output circuit of each amplifier stage, except a last amplifier stage, is coupled to the respective input circuit of the next following amplifier stage of the cascade relationship; a common output circuit providing an output signal, means for providing reference signals, first comparing means connected to the common output circuit and to the reference signal means for comparing the output signal with predetermined reference signals and providing a first comparision signal corresponding thereto, the improvement comprising a plurality of switches, each switch connecting an output circuit of a corresponding amplifier stage to the common output circuit and being responsive to a pulse to pass an output from the corresponding amplifier stage to the common output circuit which provides the passed output as the output signal, a plurality of AND gates, each AND gate being connected to a corresponding switch and controlled by a control signal to pass a pulse to the corresponding switch or to block a pulse, multiplexing means connected to the AND gates and to the first comparing means for providing sampling and holding pulses each multiplexing cycle to the AND gates in accordance with the first comparison signal so that the AND gates are controlled by the pulses, and the control signals to control the switches to pass the outputs from the amplifier stages to the common output circuit in sequence until the output signal exceeds a reference signal, at which time the amplifier stage output, which caused the output signal to exceed the reference signal, is passed to the common output circuit for the remainder of the multiplexing cycle, or when none of the outputs from the amplifier stages causes the output signal to exceed a reference signal, the output from the last amplifier stage is passed to the common output circuit for the remainder of the multiplexing cycle, unless during the multiplexing cycle the changing output signal exceeds a predetermined maximum allowable slew rate or a predetermined maximum allowable instantaneous level; means connected to the common output circuit for providing a signal corresponding to the slew rate of the output signal in accordance with the output signal; means for providing a signal corresponding to the predetermined maximum allowable slew rate for the output signal; second comparing means connected to the slew rate signal means and to maximum allowable slew rate signal means for comparing the slew rate signal with the maximum allowable slew rate signal and providing a second comparison signal corresponding thereto, means for providing a signal corresponding to a predetermined maximum allowable instantaneous level for the output signal, third comparing means connected to the common output circuit and to the maximum allowable instantaneous level signal for comparing the output signal with the maximum allowable instantaneous level signal and providing a third comparison signal corresponding thereto; and control signal means connected to the AND gates and to the second and third comparing means for providing a different control signal to each AND gate in accordance with the second and third comparison signals so that the AND gates are individual enabled in sequence to pass an applied pulse unless the slew rate of the output signal exceeds the maximum allowable slew rate or unless the instantaneous level of the output signal exceeds the maximum allowable instantaneous level at which time the next preceding AND gate is enabled for the remainder of the multiplexing cycle; said control signal means includes bidirectional counting means, means for providing counting pulses to the counting means, means connected to the counting means and to the second and third comparing means for controlling the counting means to count the counting pulses in one direction when the amplitude of the output signal does not exceed the amplitude of the maximum allowable instantaneous level signal and the slew rate of the output signal does not exceed its maximum allowable slew rate, to count the counting pulses in an opposite direction when the slew rate of the output signal exceeds the maximum allowable slew rate, and not to count the counting pulses when the amplitude of the output signal exceeds the maximum allowable instantaneous level signal and the slew rate of the output signal does not exceed the maximum allowable slew rate; and means connected to the counting means for decoding the count in the counting means to provide the control signals.

Claim 5

A method for amplifying a wide dynamic range input signal with amplifier circuits, arranged in a cascade manner to provide a plurality of amplified outputs, each output being provided by a corresponding amplifier circuit and having a predetermined gain relationship to the input signal; providing predetermined reference signals with a reference signal source; providing an output signal with a common ouTput circuit; comparing the output signal with the reference signals with a first comparator circuit which provides a corresponding first comparison signal; the improvement comprises controlling a plurality of switches with pulses, each switch connecting a corresponding amplifier circuit to the common output circuit and being responsive to a pulse to pass an amplified output from the corresponding amplifier circuit to the common output circuit which provides the passed output as the output signal; controlling a plurality of AND gates with control signals, each AND gate being connected to a corresponding switch and controlled by a control signal to pass a pulse applied to the AND gate to the corresponding switch or block a pulse applied to the AND gate; providing sampling and holding pulses to the AND gates with a multiplexing circuit each multiplexing cycle and in accordance with the first comparison signal from the first comparator circuit so that the AND gates are controlled by pulses and the control signals to cause the switches to pass the amplified outputs from the amplifier circuits to the common output circuit in sequence until the output signal exceeds a reference signal, at which time the amplified output, which caused the output signal to exceed the reference signal, is passed to the common output circuit for the remainder of the multiplexing cycle, or when none of the amplified outputs causes the output signal to exceed a reference signal, the amplified output from the last amplifier circuit is passed to the common output circuit for the remainder of the multiplexing cycle, unless during the multiplexing cycle the changing output signal exceeds a predetermined maximum allowable slew rate or a predetermined maximum allowable instantaneous level; providing a slew rate signal in accordance with the output signal with a slew rate signal circuit connected to the common output circuit; providing a signal corresponding to the predetermined maximum allowable slew rate for the output signal with a signal source; comparing the slew rate signal with the maximum allowable slew rate signal with a second comparator circuit to provide a corresponding second comparison signal; providing a signal, corresponding to the predetermined maximum allowable instantaneous level for the output signal, with the signal source; comparing the output signal with the predetermined maximum allowable instantaneous level signal with a third comparator circuit to provide a corresponding third comparison signal; providing the control signals to the AND gates with a control signal circuit and in accordance with the second and third comparison signals so that the AND gates are individually enabled to pass an applied pulse unless the output signal''s slew rate exceeds the maximum allowable slew rate or unless the output signal''s instantaneous level exceeds the maximum allowable instantaneous level at which time the next preceding AND gate is enabled for the remainder of the multiplexing cycle; said control signal providing step includes providing counting pulses with a pulse source; counting the counting pulses in one direction with a bi-directional counter when the amplitude of the output signal does not exceed the amplitude of the maximum allowable instantaneous level signal and the output signal''s slew rate does not exceed the maximum allowable slew rate, counting the counting pulses in an opposite direction with the bi-directional counter when the output signal''s slew rate exceeds the maximum allowable slew rate, and not-counting the counting pulses when the output signal''s exceeds the maximum allowable instantaneous level signal and the output signal''s slew rate does not exceed the maximum allowable slew rate; and decoding the count in the bi-directional counter with a decoder to provide the control signals.

Claim 6

A method for amplifying a wide dynamic range input signal with amplifier circuits, arranged in a cascade manner to provide a plurality of amplified outputs, each output being provided by a corresponding amplifier circuit and having a predetermined gain relationship to the input signal; providing predetermined reference signals with a reference signal source; providing an output signal with a common ouTput circuit; comparing the output signal with the reference signals with a first comparator circuit which provides a corresponding first comparison signal; the improvement comprises controlling a plurality of switches with pulses, each switch connecting a corresponding amplifier circuit to the common output circuit and being responsive to a pulse to pass an amplified output from the corresponding amplifier circuit to the common output circuit which provides the passed output as the output signal; controlling a plurality of AND gates with control signals, each AND gate being connected to a corresponding switch and controlled by a control signal to pass a pulse applied to the AND gate to the corresponding switch or block a pulse applied to the AND gate; providing sampling and holding pulses to the AND gates with a multiplexing circuit each multiplexing cycle and in accordance with the first comparison signal from the first comparator circuit so that the AND gates are controlled by pulses and the control signals to cause the switches to pass the amplified outputs from the amplifier circuits to the common output circuit in sequence until the output signal exceeds a reference signal, at which time the amplified output, which caused the output signal to exceed the reference signal, is passed to the common output circuit for the remainder of the multiplexing cycle, or when none of the amplified outputs causes the output signal to exceed a reference signal, the amplified output from the last amplifier circuit is passed to the common output circuit for the remainder of the multiplexing cycle, unless during the multiplexing cycle the changing output signal exceeds a predetermined maximum allowable slew rate or a predetermined maximum allowable instantaneous level; providing a slew rate signal in accordance with the output signal with a slew rate signal circuit connected to the common output circuit; providing a signal corresponding to the predetermined maximum allowable slew rate for the output signal with a signal source; comparing the slew rate signal with the maximum allowable slew rate signal with a second comparator circuit to provide a corresponding second comparison signal; providing a signal, corresponding to the predetermined maximum allowable instantaneous level for the output signal, with the signal source; comparing the output signal with the predetermined maximum allowable instantaneous level signal with a third comparator circuit to provide a corresponding third comparison signal; providing the control signals to the AND gates with a control signal circuit and in accordance with the second and third comparison signals so that the AND gates are individually enabled to pass an applied pulse unless the output signal''s slew rate exceeds the maximum allowable slew rate or unless the output signal''s instantaneous level exceeds the maximum allowable instantaneous level at which time the next preceding AND gate is enabled for the remainder of the multiplexing cycle; said control signal providing step includes providing counting pulses with a pulse source; counting the counting pulses in one direction with a bi-directional counter when the amplitude of the output signal does not exceed the amplitude of the maximum allowable instantaneous level signal and the output signal''s slew rate does not exceed the maximum allowable slew rate, counting the counting pulses in an opposite direction with the bi-directional counter when the output signal''s slew rate exceeds the maximum allowable slew rate, and not-counting the counting pulses when the output signal''s exceeds the maximum allowable instantaneous level signal and the output signal''s slew rate does not exceed the maximum allowable slew rate; and decoding the count in the bi-directional counter with a decoder to provide the control signals.