US3919643A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Phase sensor circuit
Assignee: Raytheon Co
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Filing: 1974-01-28
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Granted: 1975-11-11
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Expires: 1994-01-28
Abstract
Abstract A phase sensor circuit for detecting the phase of antenna impedance during signal transmission over a broad frequency band and providing a digital output for indicating a capacitive or inductive antenna load at any selected frequency of transmission in the band. Digital circuitry provides different time delay paths for sampled signal transmission and the output signal train of the different paths are combined to reduce pulse width at the pulse repetition rate. Sampled transmission is derived at a level to provide sufficient signal over the broad frequency band for required sensors including voltage samples and voltage analog samples of current. The tuning of the antenna for matching to the power amplifier is detected by individual phase and impedance broad band sensors for sequencing of capacitive and inductive reactances of an impedance matching network to approach 0* phase and the desired load resistance for efficient power transfer. Tuning is continuously monitored by a voltage standing wave ratio (VSWR) sensor which initiates and controls the duration of tuning cycles according to the detected antenna impedance matching condition.
Inventors
- 👤 Lawrence R Templin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 10:04
CPC Classifications
H; H03; H03H; H03H7/00; H03H7/38; H03H7/40; G; G01; G01R; G01R27/00; G01R27/02
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
145 words
A phase sensor circuit for detecting the phase of signal transmission comprising: circuit means for sampling undetected voltage and current of said signal transmission capable of having loads of a capacitive or inductive phase angle to produce voltage and current samples; phase detection circuit means comprising a reference circuit including at least one logical gating circuit for receiving one of said samples to provide a pulse output and a delay circuit including a plurality of logical gating circuits for receiving the other of said samples to provide a delayed pulse output; and a summing logical gating circuit means having an input for receiving the pulse outputs of said reference circuit and delay circuit to provide a pulsed output for one phase load and steady state output for the other phase load, in response to reference and delayed signals at the input of the summing circuit.
Claim 2
Dependent Claim
145 words
A phase sensor circuit for detecting the phase of signal transmission comprising: circuit means for sampling undetected voltage and current of said signal transmission capable of having loads of a capacitive or inductive phase angle to produce voltage and current samples; phase detection circuit means comprising a reference circuit including at least one logical gating circuit for receiving one of said samples to provide a pulse output and a delay circuit including a plurality of logical gating circuits for receiving the other of said samples to provide a delayed pulse output; and a summing logical gating circuit means having an input for receiving the pulse outputs of said reference circuit and delay circuit to provide a pulsed output for one phase load and steady state output for the other phase load, in response to reference and delayed signals at the input of the summing circuit.
Claim 3
Dependent Claim
65 words
The phase sensor circuit according to claim 1 in which the phase detection circuit means further includes output circuit means for receiving the output of the summing circuit and having an adjustable threshold, said output circuit means being adjusted to provide a threshold corresponding to the transition between capacitive and inductive phase angles to provide logical levels for respective phase angles of the signal transmission.
Claim 4
Dependent Claim
26 words
The phase sensor circuit according to claim 2 in which said output circuit means includes means for integrating the output pulses of the summing circuit means.
Claim 5
Dependent Claim
33 words
The phase sensor circuit according to claim 3 which further includes a frequency divider having an input coupled to the output of summing circuit and an output coupled to said means for integrating.
Claim 6
Dependent Claim
31 words
The phase sensor circuit according to claim 1 in which the phase of signal transmission being detected is the phase of an antenna impedance including an antenna and impedance matching network.
Claim 7
Dependent Claim
42 words
The phase sensor circuit according to claim 1 which includes a transmission line and the sampling circuit means comprises current and voltage transmission line taps located within a minimum length of transmission line for signal tracking over a broad band frequency range.
Claim 8
Dependent Claim
42 words
The phase sensor circuit according to claim 6 which further includes coupling circuit means for individually coupling said current and voltage transmission line taps to said phase detection circuit means, including means for capacitive coupling the current sample through an isolation network.
Claim 9
Dependent Claim
31 words
The phase sensor circuit according to claim 7 in which said coupling circuit means further includes a constant load network for coupling the voltage sample to said phase detection circuit means.
Claim 10
Dependent Claim
25 words
The phase sensor circuit according to claim 8 in which said coupling circuit means couples current and voltage samples to reference and delay circuits, respectively.
Claim 11
Dependent Claim
23 words
The phase sensor circuit according to claim 6 in which said minimum length of transmission line is less than three-quarters of an inch.
Claim 12
Dependent Claim
95 words
A digital circuit for extending the range of pulse repetition rates of circuit operation for a broad range of pulse repetition rates comprising: digital circuit means including a plurality of paths of different time delay to provide an output including a plurality of pulse trains of different phase in response to signals of the same repetition rate; and combining means responsive to the phase differential of said pulse trains provided by said output to produce a pulse train of the combined pulses of lesser time duration that the pulse repetitioN rate in the time domain.
Claim 13
Dependent Claim
95 words
A digital circuit for extending the range of pulse repetition rates of circuit operation for a broad range of pulse repetition rates comprising: digital circuit means including a plurality of paths of different time delay to provide an output including a plurality of pulse trains of different phase in response to signals of the same repetition rate; and combining means responsive to the phase differential of said pulse trains provided by said output to produce a pulse train of the combined pulses of lesser time duration that the pulse repetitioN rate in the time domain.
Claim 14
Dependent Claim
37 words
The digital circuit according to claim 11 in which said digital circuit means includes gating circuit means providing different time delay in the plurality of paths to produce the plurality of pulse trains of different time differentials.
Claim 15
Dependent Claim
75 words
Signal transmission sampling circuit arrangement comprising: a signal transmission line including circuit interrupt means for sampling the signal transmission, said circuit interrupt means including voltage and current taps disposed in close proximity on said transmission line for corresponding voltage and current samples; circuit means maintaining the level of sampling as a minor load over the broad frequency band; and circuit means coupled to the current tap for deriving a voltage analog of the current sample.
Claim 16
Dependent Claim
75 words
Signal transmission sampling circuit arrangement comprising: a signal transmission line including circuit interrupt means for sampling the signal transmission, said circuit interrupt means including voltage and current taps disposed in close proximity on said transmission line for corresponding voltage and current samples; circuit means maintaining the level of sampling as a minor load over the broad frequency band; and circuit means coupled to the current tap for deriving a voltage analog of the current sample.
Claim 17
Dependent Claim
33 words
The sampling circuit according to claim 13 in which the forward voltage wave of signal transmission is derived from the voltage tap and the reverse current wave is derived from the current tap.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-11-10 | 1979-05-12 | 1979-11-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-11-10 | 1983-05-12 | 1983-11-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-11-10 | 1987-05-12 | 1987-11-11 | $7700.00 | Window Closed / Lapsed |