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US3919619A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for generating three-phase sinusoidal voltages

Assignee: Motors Liquidation Co
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Filing: 1974-06-05
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Granted: 1975-11-11
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Expires: 1994-06-05
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Abstract

Abstract Apparatus for inverting input DC source voltage to generate three-phase, sine-wave, line-to-line output voltages. A first inverter produces three-phase, flat-top, full-wave voltages in relation to a point of reference potential on three-phase output conductors and a second inverter operating in synchronism with the first inverter generates a single-phase, flat-top voltage at three times the frequency of the output of the first inverter. A transformer having a plurality of voltage taps is coupled between the point of reference potential and the second inverter. First and second banks of voltage level selector controlled rectifiers are coupled to the voltage taps and are selectively gated to produce alternate pairs of stepped ascending and descending voltages which are selectively coupled to the three phase output conductors by voltage distributors to complement the three-phase, flat-top, full-wave voltages to complete the line-to-neutral, three-phase waveforms. These waveforms combine to form threephase, line-to-line voltages. The voltage level selector controlled rectifiers which are commutated naturally during generation of the stepped voltages are coupled directly to the voltage distributors and the voltage level selector controlled rectifiers which require auxiliary commutation are coupled to the voltage distributors through commutating switches. Current flow through the commutating switches is reduced by capacitors coupled across the three-phase output conductors to provide for a leading load power factor. The capacitor values may be selected so as to reduce the current through the commutating switches to zero for all expected load conditions to thereby allow the elimination of the commutating switches and the level selector controlled rectifiers coupled thereto.

Inventors

  • 👤 Thomas M Corry

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 17:29
CPC Classifications
H; H02; H02M; H02M7/00; H02M7/42; H02M7/44; H02M7/48; H02M7/483

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 418 words
A three-phase inverter effective to generate three-phase substantially sine-wave voltages across a set of three line conductors comprising: a unidirectional voltage source having a center tap at a neutral potential; a three-phase inverter means connected between the voltage source and the line conductors for producing three-phase, flat-top, full-wave voltages on the respective line conductors in relation to the center tap; a second inverter means connected to said source and operable to produce a single-phase, flat-tap voltage signal alternating between an upper potential and a lower potential at a predetermined frequency; an inductor having a plurality of taps; means for coupling said inductor between said second inverter means and the center tap of the voltage source, whereby flat-top voltage excitation alternating between the upper and lower potential appears thereacross at the predetermined frequency; a first group of controlled rectifiers having their anodes coupled to respective taps of the inductor and their cathodes coupled to a first junction point; a second group of controlled rectifiers having their cathodes coupled to respective taps of the inductor and their anodes coupled to a second junction point; means for selectively gating the controlled rectifiers in the first group to couple the taps of the inductor to the first junction point in ascending order when the excitation across the conductor is at the upper potential to generate a stepped upper left waveform portion and in descending order when the excitation across the conductor is at the lower potential to generate a stepped lower right waveform portion; means for selectively gating the controlled rectifiers in the second group to couple the taps of the inductor to the second junction point in descending order when the excitation across the inductor is at the upper potential to generate a stepped upper left waveform portion and in ascending order when the excitation across the inductor is at the lower potential to generate a stepped lower left waveform portion; means for coupling the upper left, upper right, lower left and lower right stepped waveform portions to the three line conductors in timed relation to the three-phase, flat-top, fullwave voltages to approximate a balanced and symmetrical line-toneutral voltage on each line conductor; a load coupled to the three line conductors; and capacitor means coupled between respective lines of the three line conductors to provide for a line-to-neutral current on each line conductor which leads the approximated balanced and symmetrical line-to-neutral voltage on the respective line conductor by an angle at least equal to the width of the stepped waveform portions.
Claim 2
Dependent Claim 418 words
A three-phase inverter effective to generate three-phase substantially sine-wave voltages across a set of three line conductors comprising: a unidirectional voltage source having a center tap at a neutral potential; a three-phase inverter means connected between the voltage source and the line conductors for producing three-phase, flat-top, full-wave voltages on the respective line conductors in relation to the center tap; a second inverter means connected to said source and operable to produce a single-phase, flat-tap voltage signal alternating between an upper potential and a lower potential at a predetermined frequency; an inductor having a plurality of taps; means for coupling said inductor between said second inverter means and the center tap of the voltage source, whereby flat-top voltage excitation alternating between the upper and lower potential appears thereacross at the predetermined frequency; a first group of controlled rectifiers having their anodes coupled to respective taps of the inductor and their cathodes coupled to a first junction point; a second group of controlled rectifiers having their cathodes coupled to respective taps of the inductor and their anodes coupled to a second junction point; means for selectively gating the controlled rectifiers in the first group to couple the taps of the inductor to the first junction point in ascending order when the excitation across the conductor is at the upper potential to generate a stepped upper left waveform portion and in descending order when the excitation across the conductor is at the lower potential to generate a stepped lower right waveform portion; means for selectively gating the controlled rectifiers in the second group to couple the taps of the inductor to the second junction point in descending order when the excitation across the inductor is at the upper potential to generate a stepped upper left waveform portion and in ascending order when the excitation across the inductor is at the lower potential to generate a stepped lower left waveform portion; means for coupling the upper left, upper right, lower left and lower right stepped waveform portions to the three line conductors in timed relation to the three-phase, flat-top, fullwave voltages to approximate a balanced and symmetrical line-toneutral voltage on each line conductor; a load coupled to the three line conductors; and capacitor means coupled between respective lines of the three line conductors to provide for a line-to-neutral current on each line conductor which leads the approximated balanced and symmetrical line-to-neutral voltage on the respective line conductor by an angle at least equal to the width of the stepped waveform portions.
Claim 3
Dependent Claim 489 words
A three phase inverter effective to generate three-phase substantially sine-wave voltages across a set of three line conductors comprising: a unidirectional voltage source having a center tap at a neutral potential; a three-phase inverter means connected between the voltage source and the line conductors for producing three-phase, flat-top, full-wave voltages on the respective line conductors in relation to the center tap; a second inverter means connected to said source and operable to produce a single-phase, flat-top voltage signal alternating between an upper potential and a lower potential at a predetermined frequency; an inductor having a plurality of taps; means for coupling said inductor between said second inverter means and the center tap of the voltage source, whereby flat-top voltage excitation alternating between the upper and lower potential appears thereacross at the predetermined frequency; a first bank of voltage level selector switches including a first group of controlled rectifiers having their anodes coupled to respective taps of the inductor and their cathodes coupled to a first junction point and a second group of controlled rectifiers having their cathodes coupled to respective taps of the inductor; a second bank of voltage level selector switches including a third group of controlled rectifiers having their cathodes coupled to respective taps of the inductor and their anodes coupled to a second junction point and a fourth group of controlled rectifiers having their anodes to respective taps of the inductor; first commutating switch means coupled between the anodes of the second group of controlled rectifiers and the first junction point; second commutating switch means coupled between the cathodes of the fourth group of controlled rectifiers and the second junction point; means for selectively gating the controlled rectifiers in the first and second groups and the first commutating switch means to couple the taps of the inductor to the first junction point in ascending order when the excitation across the conductor is at the upper potential to generate a stepped upper left waveform portion and in descending order when the excitation across the conductor is at the lower potential to generate a stepped lower right waveform portion; means for selectively gating the controlled rectifiers in the third and fourth groups to couple the taps of the inductor to the second junction point in descending order when the excitation across the inductor is at the upper potential to generate a stepped upper left waveform portion and in ascending order when the excitation across the inductor is at the lower potential to generate a stepped lower left waveform portion; means for coupling the upper lef, upper right, lower left and lower right stepped waveform portions to the three line conductors in timed relation to the three-phase, flat-top, full-wave voltages to approximate a balanced and symmetrical line-to-neutral voltage on each line conductor; a load coupled to the three line conductors; and capacitor means coupled between respective lines of the three line conductors to provide for a leading load current.
Claim 4
Dependent Claim 489 words
A three phase inverter effective to generate three-phase substantially sine-wave voltages across a set of three line conductors comprising: a unidirectional voltage source having a center tap at a neutral potential; a three-phase inverter means connected between the voltage source and the line conductors for producing three-phase, flat-top, full-wave voltages on the respective line conductors in relation to the center tap; a second inverter means connected to said source and operable to produce a single-phase, flat-top voltage signal alternating between an upper potential and a lower potential at a predetermined frequency; an inductor having a plurality of taps; means for coupling said inductor between said second inverter means and the center tap of the voltage source, whereby flat-top voltage excitation alternating between the upper and lower potential appears thereacross at the predetermined frequency; a first bank of voltage level selector switches including a first group of controlled rectifiers having their anodes coupled to respective taps of the inductor and their cathodes coupled to a first junction point and a second group of controlled rectifiers having their cathodes coupled to respective taps of the inductor; a second bank of voltage level selector switches including a third group of controlled rectifiers having their cathodes coupled to respective taps of the inductor and their anodes coupled to a second junction point and a fourth group of controlled rectifiers having their anodes to respective taps of the inductor; first commutating switch means coupled between the anodes of the second group of controlled rectifiers and the first junction point; second commutating switch means coupled between the cathodes of the fourth group of controlled rectifiers and the second junction point; means for selectively gating the controlled rectifiers in the first and second groups and the first commutating switch means to couple the taps of the inductor to the first junction point in ascending order when the excitation across the conductor is at the upper potential to generate a stepped upper left waveform portion and in descending order when the excitation across the conductor is at the lower potential to generate a stepped lower right waveform portion; means for selectively gating the controlled rectifiers in the third and fourth groups to couple the taps of the inductor to the second junction point in descending order when the excitation across the inductor is at the upper potential to generate a stepped upper left waveform portion and in ascending order when the excitation across the inductor is at the lower potential to generate a stepped lower left waveform portion; means for coupling the upper lef, upper right, lower left and lower right stepped waveform portions to the three line conductors in timed relation to the three-phase, flat-top, full-wave voltages to approximate a balanced and symmetrical line-to-neutral voltage on each line conductor; a load coupled to the three line conductors; and capacitor means coupled between respective lines of the three line conductors to provide for a leading load current.

References Cited (Backward Citations)

US3725767A Cited
US3781635A Cited
US3829736A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-11-10 1979-05-12 1979-11-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-11-10 1983-05-12 1983-11-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-11-10 1987-05-12 1987-11-11 $7700.00 Window Closed / Lapsed

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