Apparatus and method for two controller diagnostic and verification procedures in a data processing unit

Claim 2

In combination with a data processing unit having at least two subsystems, apparatus for controlling the operation of a one of said two subsystems by another of said two subsystems, including: a first control store circuit included within a first subsystem comprising, a first control store memory for storing a first group of signals, a first control circuit coupled to said first control store memory for controlling storage and extraction of said first group of signals, and a first subcommand generator for controlling operation of said first subsystem in response to said first group of signals; a second control store circuit included within a second subsystem comprising, a second control store memory for storing a second group of signals, a second control store circuit coupled to said first control store memory for controlling storage and extraction of said second group of signals, and a second subcommand generator for controlling operation of said second subsystem in response to said second group of signals; first means coupling said first control store memory and said second subcommand generator, said first group of signals applied to said second subcommand generator in response to a first command signal for controlling operation of said second subsystem; and second means coupling said second control store memory and said first subcommand generator, said second group of signals applied to said first subcommand generator in response to a second command signal for controlling operation of said first subsystem.

Claim 3

The apparatus of claim 1 further including: a maintenance interface unit coupled to said first and said second control store circuits for manually controlling operation of said first and said second subsystem.

Claim 4

In combination with a data processing unit having at least two subsystems, apparatus for verifying the operation of and for localizing errors in said data processing unit comprising: a data bus for transmitting electrical signals; a first control store network included within a first subsystem for controlling the operation of said first subsystem, said first control store network coupled to said data bus; a second control store network included within a second subsystem for controlling the operation of said second subsystem, said second control store network coupled to said data bus; a control bus for transmitting command and control signals coupled to said first and said second control store networks, said first control store network controlling said second subsystem in response to a first command signal, said second control store network controlling said first subsystem in response to a second command signal; a first integrity check network for identification of error conditions in said first subsystem, said first integrity check network coupled to said data bus; a second integrity check network for identification of error conditions in said second subsystem, said second integrity network coupled to said data bus; and a plurality of registers coupled to said data bus, said registers receiving signals from and applying signals to said firSt and said second control store networks in response to appropriate control signals, said plurality of registers locating a fault condition in response to operation of said first and said second subsystems under control of said first and said second control store networks.

Claim 5

In combination with a data processing unit having at least two subsystems, apparatus for verifying the operation of and for localizing errors in said data processing unit comprising: a data bus for transmitting electrical signals; a first control store network included within a first subsystem for controlling the operation of said first subsystem, said first control store network coupled to said data bus; a second control store network included within a second subsystem for controlling the operation of said second subsystem, said second control store network coupled to said data bus; a control bus for transmitting command and control signals coupled to said first and said second control store networks, said first control store network controlling said second subsystem in response to a first command signal, said second control store network controlling said first subsystem in response to a second command signal; a first integrity check network for identification of error conditions in said first subsystem, said first integrity check network coupled to said data bus; a second integrity check network for identification of error conditions in said second subsystem, said second integrity network coupled to said data bus; and a plurality of registers coupled to said data bus, said registers receiving signals from and applying signals to said firSt and said second control store networks in response to appropriate control signals, said plurality of registers locating a fault condition in response to operation of said first and said second subsystems under control of said first and said second control store networks.

Claim 6

The apparatus of claim 3 further including a maintenance interface unit coupled to said first and said second control store networks for manually entering data into said first and said second control store networks.

Claim 7

The apparatus of claim 4 further including a diagnostic display panel coupled to said first and said second integrity check network for identifying a malfunctioning unit causing a detected error condition.

Claim 8

In combination with a data processing unit having at least two subsystems apparatus, for verifying the operation of and for localizing errors in said data processing unit, comprising: a first control circuit included within a first subsystem, for controlling the operation of said first subsystem; a second control circuit included within a second subsystem, for controlling the operation of said second subsystem; means for coupling said second control circuit and said first control circuit, said second control circuit controlling the operation of said first subsystem in response to a first command signal, said first control circuit controlling the operation of said second subsystem in response to a second command signal; first means for detection of a result of the operation of said first subsystem; second means for detection of a result of the operation of said second subsystem; and a data bus coupled to said first control circuit, said second control circuit, said first detection means and said second detection means, said data bus exchanging data signals between said control circuits and said first and said second detection means.

Claim 9

In combination with a data processing unit having at least two subsystems apparatus, for verifying the operation of and for localizing errors in said data processing unit, comprising: a first control circuit included within a first subsystem, for controlling the operation of said first subsystem; a second control circuit included within a second subsystem, for controlling the operation of said second subsystem; means for coupling said second control circuit and said first control circuit, said second control circuit controlling the operation of said first subsystem in response to a first command signal, said first control circuit controlling the operation of said second subsystem in response to a second command signal; first means for detection of a result of the operation of said first subsystem; second means for detection of a result of the operation of said second subsystem; and a data bus coupled to said first control circuit, said second control circuit, said first detection means and said second detection means, said data bus exchanging data signals between said control circuits and said first and said second detection means.

Claim 10

The apparatus of claim 6 further including a direct register associated with said first and said second subsystem, each of said direct registers coupled to said data bus, said direct register being a main adder operand register, said register providing a main transfer of data between said first and said second subsystems.

Claim 11

The apparatus of claim 7 further including means for manually entering data into said first and said second control circuit.

Claim 12

The apparatus of claim 8 further including a diagnostic display panel coupled to said first and said detection means, said diagnostic display panel identifying a malfunctioning unit when said results of the operation of said first and said second subsystem is an error condition.