Gated oscillator having constant average d.c. output voltage during on and off times

Claim 2

In combination: an oscillator; means for applying a control voltage to the oscillator for causing the latter to produce oscillations at an average d.c. voltage level other than a reference voltage level; a summing circuit to which said oscillations are applied; and means responsive to said control voltage when it is at a level to terminate said oscillations for applying to said summing circuit a voltage at a level such that it causes the summing circuit to produce a d.c. voltage level in the absence of said oscillations which is equal to that it produces during the presence of said oscillations.

Claim 3

The combination recited in claim 1 wherein said oscillator comprises: a plurality of logic gate circuits each having at least one input terminal and an output terminal, the output terminal of each logic gate circuit coupled to the input terminal of the following logic gate circuit, and said logic gate circuits interconnected in a ring; a second input terminal at one of said logic gate circuits to which said control voltage is applied; and an oscillator output terminal comprising the output terminal of one of said logic gate circuits.

Claim 4

The combination recited in claim 1 wherein said means responsive to the level of said control voltage comprises: a signal translator having an input and an output terminal, said control voltage being applied to said input terminal, and said output terminal being connected to said summing network.

Claim 5

The combination recited in claim 1 wherein said summing circuit comprises: an impedance coupling the output terminal of said oscillator to a circuit output terminal; and an impedance coupling the output terminal of said signal translator to said circuit output terminal.

Claim 6

In combination: a logic gate oscillator comprising a first logic gate having an input terminal to which a control voltage may be applied for priming that gate and having also a feedback loop including a binary inverter connected between the output terminal of said logic gate and a second input terminal of that logic gate, the output terminal of said oscillator being coupled to the output terminal of said inverter, whereby when said oscillator is turned on, the oscillations at said output terminal are at an average d.c. voltage level other than a reference voltage level; a second binary inverter similar to the said first inverter and receptive of said control voltage, said second inverter producing an output voltage level other than said reference voltage level when said control voltage is at a value to turn said oscillator off; and a summming network receptive of the output of both inverters for producing, in response to said oscillations, an average d.c. voltage level at its output terminal of a given value, and for producing, in response to the output of said second inverter and the absence of said oscillations, at the summing network output terminal a d.c. voltage level of the same value as produced during said oscillations.

Claim 7

In combination: a logic gate oscillator comprising a first logic gate having an input terminal to which a control voltage may be applied for priming that gate and having also a feedback loop including a binary inverter connected between the output terminal of said logic gate and a second input terminal of that logic gate, the output terminal of said oscillator being coupled to the output terminal of said inverter, whereby when said oscillator is turned on, the oscillations at said output terminal are at an average d.c. voltage level other than a reference voltage level; a second binary inverter similar to the said first inverter and receptive of said control voltage, said second inverter producing an output voltage level other than said reference voltage level when said control voltage is at a value to turn said oscillator off; and a summming network receptive of the output of both inverters for producing, in response to said oscillations, an average d.c. voltage level at its output terminal of a given value, and for producing, in response to the output of said second inverter and the absence of said oscillations, at the summing network output terminal a d.c. voltage level of the same value as produced during said oscillations.