Frequency adjustment of timekeepers

Claim 2

A timekeeping instrument comprising a time base oscillator, an adjustable frequency divider connected to the output of said oscillator, means coupled to said divider for comparing the frequency to be adjusted of the divider output signal with a reference frequency of a standard signal, means coupled to said comparing means for computing as a function of the measured difference the value of the division ratio necessary for the divider output frequency to be equal to the reference frequency, an alterable memory coupled to said computing means for storing the output thereof, and means coupled between said memory and said divider for setting the division ratio of said divider at said computed value.

Claim 3

A timekeeping instrument, comprising: a time base oscillator; an adjustable frequency divider coupled to the output of said oscillator for dividing the frequency of the output signal generated by said oscillator; alterable memory means; first comparator means having a first input coupled to a corresponding output from said frequency divider, a second input coupled to a reference frequency signal source, and an output coupled to an input of said memoRy means, wherein said first comparator means includes means to compare one period of said reference frequency with the output of said divider and store the result of said comparison in said memory means; second comparator means having a first input coupled to said divider output and a second input coupled to an output from said memory means; and means coupling the output of said second comparator means to said frequency divider to adjust the divider output as a function of the information stored in said memory means.

Claim 4

A timekeeping instrument, comprising: a time base oscillator; an adjustable frequency divider coupled to the output of said oscillator for dividing the frequency of the output signal generated by said oscillator; alterable memory means; first comparator means having a first input coupled to a corresponding output from said frequency divider, a second input coupled to a reference frequency signal source, and an output coupled to an input of said memoRy means, wherein said first comparator means includes means to compare one period of said reference frequency with the output of said divider and store the result of said comparison in said memory means; second comparator means having a first input coupled to said divider output and a second input coupled to an output from said memory means; and means coupling the output of said second comparator means to said frequency divider to adjust the divider output as a function of the information stored in said memory means.

Claim 5

An instrument according to claim 2, in which the adjustable frequency divider is a preselection counter comprising a plurality of resettable binary divider stages whose outputs are connected to first inputs of said second comparator, second inputs of said second comparator being connected to the memory outputs, and the output of said second comparator being connected to the reset inputs of the binary divider stages, said second comparator forming means for resetting said binary dividing stages to zero when the frequency divider state is equal to the content of the memory.

Claim 6

An instrument according to claim 2, wherein said second comparator comprises a portion of said frequency divider circuit.

Claim 7

An instrument according to claim 4, wherein said frequency divider comprises a plurality of binary divider stages; and further comprising an inhibit circuit interposed between said oscillator and said divider, and a control circuit having first inputs coupled to the respective outputs of said binary divider stages and second inputs coupled to corresponding outputs of said memory means, the output of said control circuit being coupled to said inhibit circuit to inhibit input pulses to said frequency divider equal to the contents of said memory means during each period of the frequency divider output signal.