Pulse duration process controller

Claim 2

A process controller comprising, in combination, an analog input means for receiving an input signal and producing a first output signal representing the absolute magnitude of said input signal and a second output signal representing the sense of said input signal; a first conversion means for receiving said first output signal and converting it to a first set of digital signals representing a first number corresponding to said absolute magnitude; a second conversion means for receiving said first set of digital signals and being responsive thereto for producing a first train of pulses corresponding to said first number; and up/down counter means for receiving said first train of pulses and counting them up, and, while counting them up, producing a second set of digital signals representing a second number corresponding to the up-count at any instant; a third conversion means for receiving said second set of digital signals and converting it to a second train of pulses representative of said second number; said up/down counter means being connected to said third conversion means for receiving said second train of pulses and down-counting them while up-counting said first train; an output counter connected to said up/down counter to receive said second set of digital signals for counting the number represented thereby down; a rate generator means operable to set the rate at which said output counter counts down, and control means responsive to said output counter counting down for producing a control effect proportional to the time it takes to count the last said number down, said control means being also responsive to said second output signal for causing said control effect to have the sense of said input signal.

Claim 3

The process controller of claim 1 wherein said second conversion means includes fourth conversion means for receiving said first set of digital signals and converting it to a third train of pulses representative of said first number; said second conversion means including fifth conversion means for receiving a gain signal and converting it to a third set of digital signals corresponding to said gain; said second conversion means including sixth coanversion means for receiving said third set of digital signals and said third train of pulses for causing said first train of pulses to be representative of the product of said gain and said first number.

Claim 4

A process controller comprising, in combination, an analog device for producing an analog signal proportional to the magnitude of process deviation; digital means for having applied thereto a firsT set of digital signals and responding thereto by producing a pulse the duration of which is proportional to a number represented by said first set; converting means for converting a sampled value of said analog signal to said first set of digital signals; a decimal setting device for converting a decimal value into a second set of digital signals and applying said second set to said digital means; said digital means being responsive to said second set of digital signals for causing said pulse also to be proportional to said decimal value; said digital means comprising an up/down pulse counter, an output counter, a first rate multiplier, a second rate multiplier and a third rate multiplier, each said rate multiplier having a first input for a first pulse train, a second input for a set of digital signals, and an output for a second pulse train representing the pulse rate of said first pulse train multiplied by a numerical factor represented by the last said set of digital signals; said first rate multiplier having its output connected to the said first input of said second rate multiplier; said second and third rate multipliers having their said outputs connected to said up/down counter for having the corresponding said second pulse trains respectively counted up and counted down substantially simultaneously, said up/down counter having an output for producing a set of digital signals representing the magnitude of the difference between its up count and its down count; said up/down counter having its said output connected to said third rate multiplier''s second input, and to said output counter for entering in this last a count proportional to the product of said number and said decimal value, there being means for converting the last said count into the first said pulse.

Claim 5

A process controller comprising, in combination, an analog device for producing an analog signal proportional to the magnitude of process deviation; digital means for having applied thereto a firsT set of digital signals and responding thereto by producing a pulse the duration of which is proportional to a number represented by said first set; converting means for converting a sampled value of said analog signal to said first set of digital signals; a decimal setting device for converting a decimal value into a second set of digital signals and applying said second set to said digital means; said digital means being responsive to said second set of digital signals for causing said pulse also to be proportional to said decimal value; said digital means comprising an up/down pulse counter, an output counter, a first rate multiplier, a second rate multiplier and a third rate multiplier, each said rate multiplier having a first input for a first pulse train, a second input for a set of digital signals, and an output for a second pulse train representing the pulse rate of said first pulse train multiplied by a numerical factor represented by the last said set of digital signals; said first rate multiplier having its output connected to the said first input of said second rate multiplier; said second and third rate multipliers having their said outputs connected to said up/down counter for having the corresponding said second pulse trains respectively counted up and counted down substantially simultaneously, said up/down counter having an output for producing a set of digital signals representing the magnitude of the difference between its up count and its down count; said up/down counter having its said output connected to said third rate multiplier''s second input, and to said output counter for entering in this last a count proportional to the product of said number and said decimal value, there being means for converting the last said count into the first said pulse.

Claim 6

The process controller of claim 3, wherein means are provided for causing said converting means to sample said analog value at predetermined intervals and for causing said digital means to respond to successive samples of said analog signal for producing said pulse substantially repetitively.

Claim 7

A process controller comprising, in combination, an analog device for producing an analog signal proportional to the magnitude of process deviation; digital means for having applied thereto a first set of digital signals and responding thereto by producing a pulse the duration of which is proportional to a first number represented by said first set; converting means for converting a sampled value of said analog signal to said first set of digital signals; a deadband comparator for comparing said first set of digital signals to a predetermined set of digital signals representing a second number proportional to a process deviation too small to allow said digital means to produce a said pulse of corresponding duration; said comparator being responsive to said first set of signals corresponding to less than said second number for preventing production of a said pulse of corresponding duration; said digital means being responsive to said first set of digital signals for causing said pulse''s duration to be proportional to said deviation substantially only when said comparator''s output indicates that said first number is greater than said second number; said process controller also comprising, in combination, a setting device for providing a second set of digital signals and applying said second set to said digital means; said digital means comprising, an up/down pulse counter, an output counter, a first rate multiplier, a second rate multiplier and a third rate multiplier, each said multiplier having a first input for a first pulse train, a second input for a set of digital signals, and a output for a second pulse train representing the pulse rate of said first pulse train multiplied by a numerical factor represented by the last said set of digital signals; said first rate multiplier having its output connected To the said first input of said second rate multiplier; said second and third rate multiplier having their said outputs connected to said up/down counter for having the corresponding said second pulse trains respectively counted up and counted down substantially simultaneously, said up/down counter having an output for producing a set of digital signals representing the magnitude of the difference between its up count and its down count; said up/down counter having its said output connected to said third rate multiplier''s second input, and to said output counter for entering in this last a count proportioanl to the product of said number and said decimal value, there being means for converting the last said count into the first said pulse.

Claim 8

A process controller comprising, in combination, an analog device for producing an analog signal proportional to the magnitude of process deviation; digital means for having applied thereto a first set of digital signals and responding thereto by producing a pulse the duration of which is proportional to a first number represented by said first set; converting means for converting a sampled value of said analog signal to said first set of digital signals; a deadband comparator for comparing said first set of digital signals to a predetermined set of digital signals representing a second number proportional to a process deviation too small to allow said digital means to produce a said pulse of corresponding duration; said comparator being responsive to said first set of signals corresponding to less than said second number for preventing production of a said pulse of corresponding duration; said digital means being responsive to said first set of digital signals for causing said pulse''s duration to be proportional to said deviation substantially only when said comparator''s output indicates that said first number is greater than said second number; said process controller also comprising, in combination, a setting device for providing a second set of digital signals and applying said second set to said digital means; said digital means comprising, an up/down pulse counter, an output counter, a first rate multiplier, a second rate multiplier and a third rate multiplier, each said multiplier having a first input for a first pulse train, a second input for a set of digital signals, and a output for a second pulse train representing the pulse rate of said first pulse train multiplied by a numerical factor represented by the last said set of digital signals; said first rate multiplier having its output connected To the said first input of said second rate multiplier; said second and third rate multiplier having their said outputs connected to said up/down counter for having the corresponding said second pulse trains respectively counted up and counted down substantially simultaneously, said up/down counter having an output for producing a set of digital signals representing the magnitude of the difference between its up count and its down count; said up/down counter having its said output connected to said third rate multiplier''s second input, and to said output counter for entering in this last a count proportioanl to the product of said number and said decimal value, there being means for converting the last said count into the first said pulse.