US3914580A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Timing control circuit for electronic fuel injection system
Assignee: Boeing North American Inc
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Filing: 1973-04-25
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Granted: 1975-10-21
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Expires: 1993-04-25
Abstract
Abstract A digital circuit is provided for establishing the proper time for supplying a control signal, for example, for firing a fuel injector. The circuit operates primarily upon timing signals from the distributor (as well as a pulse width computer) to determine the proper sequence and timing arrangement for supplying the control signals.
Inventors
- 👤 George A Watson
- 👤 John J Bollinger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 08:18
CPC Classifications
F; F02; F02D; F02D41/00; F02D41/009; F02D41/24; F02D41/2403; F02D41/30; F02D41/32; F02D41/34; F02M; F02M51/00; Y; Y02; Y02T; Y02T10/00; Y02T10/10; Y02T10/40
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
310 words
In combination, signal supplying means for supplying signals having varying periodicity, first means connected to said signal supplying means for producing a first control signal representative of the periodicity of signals supplied thereby, second means connected to said signal supplying means for producing a second control signal representative of the periodicity of signals supplied thereby, first counter means for producing a first function signal, said first counter means connected to said first means to receive said first control signal to establish a first condition in said first counter means, said first counter means connected to said second means to receive said second control signal to establish a different condition in said first counter means, timer means for producing a timing signal, said timer means connected to said second means to receive said second control signal to establish a first condition in said timer means, second counter means for producing a second function signal, said second counter means connected to said second means to receive said control signal to establish a first condition in said second counter means, said second counter means connected to said timer means to receive said timing signal, input means for supplying input signals, said input means connected to said second counter such that said timing signal and said input signals control the operation of said second counter means, first control means connected to said second means, to said timing means and to said second counter means to receive said second control signal, said timing signal and said second function signal in order to produce a third function signal representative of the relationship therebetween, and output control means connected to said first counter means, said input means and said first control means to receive said input signals, said first function signal and said third function signal to produce an output control signal representative of the relationship therebetween.
Claim 2
Dependent Claim
310 words
In combination, signal supplying means for supplying signals having varying periodicity, first means connected to said signal supplying means for producing a first control signal representative of the periodicity of signals supplied thereby, second means connected to said signal supplying means for producing a second control signal representative of the periodicity of signals supplied thereby, first counter means for producing a first function signal, said first counter means connected to said first means to receive said first control signal to establish a first condition in said first counter means, said first counter means connected to said second means to receive said second control signal to establish a different condition in said first counter means, timer means for producing a timing signal, said timer means connected to said second means to receive said second control signal to establish a first condition in said timer means, second counter means for producing a second function signal, said second counter means connected to said second means to receive said control signal to establish a first condition in said second counter means, said second counter means connected to said timer means to receive said timing signal, input means for supplying input signals, said input means connected to said second counter such that said timing signal and said input signals control the operation of said second counter means, first control means connected to said second means, to said timing means and to said second counter means to receive said second control signal, said timing signal and said second function signal in order to produce a third function signal representative of the relationship therebetween, and output control means connected to said first counter means, said input means and said first control means to receive said input signals, said first function signal and said third function signal to produce an output control signal representative of the relationship therebetween.
Claim 3
Dependent Claim
33 words
The combination recited in claim 1 wherein said timer means includes feedback means for returning said timing signal to an input of said timer means to establish a maximum timing signal condition therein.
Claim 4
Dependent Claim
20 words
The combination recited in claim 1 including initialization means connected to said output control means to establish initial operating conditions.
Claim 5
Dependent Claim
51 words
THe combination recited in claim 1 including switch means connected to receive said timing signal from said timer means and said second control signal from said second means, said switch means connected to supply a timing signal to said second counter means to control the counting by said second counter means.
Claim 6
Dependent Claim
54 words
The combination recited in claim 1 including, comparing means connected to receive said timing signal from said timer means and said second function signal from said second counter means, and to produce a signal representative of the relation therebetween, said comparing means connected to supply the signal produced thereby to said second counter means.
Claim 7
Dependent Claim
51 words
The combination recited in claim 1 wherein said input means includes, reference signal supplying means, input signal supplying means, means for comparing the signals produced by said reference signal supplying means and said input signal supplying means to produce said input signals which represent the relationship between the signals supplied thereto.
Claim 8
Dependent Claim
74 words
The combination recited in claim 1 wherein said output control means includes difference means connected to receive said first function signal and said first control signal in order to produce a difference signal representative of the difference between these signals, at least one driver means connected to receive said difference signal and said fourth function signal and to be enabled by the concurrent application of said fourth function signal and an appropriate difference signal.
Claim 9
Dependent Claim
33 words
The combination recited in claim 7 including decoder means connected to receive said difference signal and to supply a decoded signal to said driver means to select the driver means to be enabled.
Claim 10
Dependent Claim
75 words
The combination recited in claim 7 including comparator means, counter means, and switch means connected to said driver means, said counter means connected to receive signals from said switch means in order to control the operation of said counter means, said comparator means connected to receive said input signal and the output signal from said counter means in order to produce a signal which is supplied to said switch means to control the operation thereof.
Claim 11
Dependent Claim
116 words
The combination recited in claim 1 wherein said second counter means includes threshold counter means connected to receive said second control signal at one input terminal to establish a first condition in said threshold counter means, memory means connected to the output of said threshold counter means to receive said second function signal as a memory address signal, comparator means connected to receive said timing signal and the signal stored in the address in said memory means which is addressed by the memory address signal from said threshold counter, and gate means for selectively supplying the output signal from said comparator means to another input terminal to establish a different condition in said threshold counter means.
Claim 12
Dependent Claim
167 words
The combination recited in claim 1 wherein said first control means includes up/down counter means for producing said third function signal, comparator means, and gating means for producing said fourth function signal, said comparator connected to receive said second function signal from said second counter means and said third function signal from said up/down counter means and to supply a first output signal to said up/down counter means and to said gating means and a second output signal to said gating means, said gating means producing said fourth function signal in response to concurrent application of said first output signal from said up/down counter means and said second control signal from said second means without affecting said up/down counter means, said gating means producing said fourth function signal which is returned to said up/down counter means in response to the concurrent application of said second output signal from said up/down counter means and said seCond control signal from said second means in conjunction with said timing signal.
Claim 13
Dependent Claim
216 words
In combination, means for supplying pulses of varying periodicity, first logic circuit means connected to receive pulses from said means for supplying pulses to produce at least two control signals representative of said pulses received thereby, second logic circuit means connected to receive different pulses from said means for supplying pulses and to produce a third control signal representative of the pulses received thereby, first, second and third counter means for counting said control signals and producing function signals representative thereof, said first counter means connected to receive said third control signal from said second logic circuit and one of said two control signals from said first logic circuit and to produce a first function signal representative of the signals received thereby, said second counter means adapted to count toward a prescribed maximum condition at a controlled rate until periodically reset to a prescribed condition by said third control signal and to produce a second function representative of the instantaneous condition thereof, said third counter means adapted to count at a controlled rate in response to a condition produced in response to at least one of said function signals until reset to a prescribed condition by said third control signal, and means for receiving said control signals and said function signals to produce an output signal.
Claim 14
Dependent Claim
216 words
In combination, means for supplying pulses of varying periodicity, first logic circuit means connected to receive pulses from said means for supplying pulses to produce at least two control signals representative of said pulses received thereby, second logic circuit means connected to receive different pulses from said means for supplying pulses and to produce a third control signal representative of the pulses received thereby, first, second and third counter means for counting said control signals and producing function signals representative thereof, said first counter means connected to receive said third control signal from said second logic circuit and one of said two control signals from said first logic circuit and to produce a first function signal representative of the signals received thereby, said second counter means adapted to count toward a prescribed maximum condition at a controlled rate until periodically reset to a prescribed condition by said third control signal and to produce a second function representative of the instantaneous condition thereof, said third counter means adapted to count at a controlled rate in response to a condition produced in response to at least one of said function signals until reset to a prescribed condition by said third control signal, and means for receiving said control signals and said function signals to produce an output signal.
Claim 15
Dependent Claim
38 words
The combination recited in claim 12 wherein said means for supplying pulses produces a first train of pulses for establishing a timing operation and a second train of pulses for establishing a reference point in said timing operation.
Claim 16
Dependent Claim
83 words
The combination recited in claim 12 including logic means having one input terminal connected to said second counter means and one output terminal connected to said third counter means whereby the signal at said one output terminal of said logic means is a function of the signal supplied at said one input terminal of said logic means, said logic means having a second input terminal connected to said second logic circuit means whereby said logic means is triggered by said third control signal.
Claim 17
Dependent Claim
45 words
The combination recited in claim 14 including input means for supplying input signals, said input means connected to said third counter means whereby said input signals and at least one of said function signals produce said condition which permits counting by said third counter means.
Claim 18
Dependent Claim
85 words
The combination recited in claim 15 including feedback means connected from the output of said third counter means to the input thereof, said feedback means connected to said second counter means to receive said second function signal whereby the operation of said feedback means is controlled, and gate means having input terminals connected to receive signals from said input means, said logic means and said feedback means, said gate means having an output terminal connected to said third counter means to control the counting thereof.
Claim 19
Dependent Claim
68 words
The combination recited in claim 14 wherein said input means includes, reference signal supplying means for establishing a threshold signal representative of a prescribed pulsewidth, input signal supplying means for establishing a signal of an actual pulsewidth, and means for comparing the signals supplied by said reference signal supplying means and said input signal supplying means in order to produce an output signal representative of the relationship therebetween.
Claim 20
Dependent Claim
163 words
The combination recited in claim 12 including further counting means, comparision means connected to said further counting means and to said third counter means to compare the signals supplied thereby and to produce output signals representative of the relative status of said signals supplied, first means for selectively supplying one output signal produced by said cOmparison means to said further counting means, logic means, second means for selectively supplying another output signal produced by said comparison means to said logic means, each of said first and second means connected to receive said third control signal which enables said first and second means, first gate means for selectively supplying the output signal from said logic means to output means, to said further counting means and to said logic means in response to said second function signal produced by said second counter means, and second gate means for selectively supplying said one output signal to said output means in response to said third control signal.
Claim 21
Dependent Claim
25 words
The combination recited in claim 18 including comparator means connected between said second and third counter means to provide a signal which controls said condition.
Claim 22
Dependent Claim
69 words
The combination recited in claim 19 wherein said means for receiving includes further counter means connected to selectively count said third control signals, and further comparator means connected to said further counter means and to said third counter means to produce a controlling signal representative of the relationship between the signals produced by each of said third and said further counter means to control the production of output signal.
Claim 23
Dependent Claim
46 words
The combination recited in claim 20 including subtractor means connected to said first counter means and said further counter means to subtract the signals produced thereby, and decoder means connected to said subtractor to produce enabling signals at selected ones of a plurality of utilization devices.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-10-20 | 1979-04-21 | 1979-10-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-10-20 | 1983-04-21 | 1983-10-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-10-20 | 1987-04-21 | 1987-10-21 | $7700.00 | Window Closed / Lapsed |