← Back to Patent Explorer
US3913068A Expired / Lapsed US ⏱️ 0.0 years remaining

Error correction of serial data using a subfield code

Assignee: International Business Machines Corp
•
Filing: 1974-07-30
•
Granted: 1975-10-14
•
Expires: 1994-07-30
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract This specification describes an error correction scheme for digital information serially recorded on a magnetic medium; for example, in stripes oriented diagonally across magnetic tape. The digital information is arranged in segments made up of a set of data sections and two subfield code sections generated on a byte for byte basis from the set of data sections in accordance with Patel U.S. Pat. No. 3,745,528. Thus the first byte of each of the subfield code sections is generated from the first bytes in all the data sections, the second byte of each subfield code section is generated from the second bytes in all the data sections and so on. Each of the sections in the segment is terminated with a synchronization burst. With this arrangement up to two full sections of any data segment can be corrected using these subfield code sections.

Inventors

  • 👤 Arvind M Patel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 02:42
CPC Classifications
G; G11; G11B; G11B20/00; G11B20/10; G11B20/18; G11B20/1806; G11B20/1809; G11B20/1803

Claims Analysis

Total Claims: 10
Claim 1
Independent Claim 159 words
An error correction system for data bytes D to be arranged serially on a recording medium, comprising: encoder means for generating two check bytes C1 and C2 from k data bytes spaced n data bytes apart from each other in the serial sequence wherein the first check byte C1 D1 + D2 + D3 . . . + Dk and second check byte C2 T D1 + T2 D2 + T3 D3 . . . + Tk Dk where T is the companion matrix of a binary primative polynomial g(x) of degree f and lambda is any integer given by the expression t(2f-1)/(2b-1) in which t is any positive integer prime to 2b-1; means for adding these 2n check bytes at the end of the string of k X n data bytes they are produced from and, synchronization pulse means providing a periodic synchronization burst of non data pulses in series with the data byte to synchronize the data.
Claim 2
Dependent Claim 159 words
An error correction system for data bytes D to be arranged serially on a recording medium, comprising: encoder means for generating two check bytes C1 and C2 from k data bytes spaced n data bytes apart from each other in the serial sequence wherein the first check byte C1 D1 + D2 + D3 . . . + Dk and second check byte C2 T D1 + T2 D2 + T3 D3 . . . + Tk Dk where T is the companion matrix of a binary primative polynomial g(x) of degree f and lambda is any integer given by the expression t(2f-1)/(2b-1) in which t is any positive integer prime to 2b-1; means for adding these 2n check bytes at the end of the string of k X n data bytes they are produced from and, synchronization pulse means providing a periodic synchronization burst of non data pulses in series with the data byte to synchronize the data.
Claim 3
Dependent Claim 24 words
The error correction system of claim 1 including encoding means for Encoding each data digit in said data bytes in bit pairs or couples.
Claim 4
Dependent Claim 25 words
The error correction system of claim 2 wherein said synchronization pulse means is a means for generating an invalid code sequence of said bit pairs.
Claim 5
Dependent Claim 33 words
The error correction system of claim 1 wherein said encoding means is a means for providing encoded sequennce of data bit pairs that meet charge constraints and maximum and minimum run length constraints.
Claim 6
Dependent Claim 38 words
The error correction system of claim 4 wherein said synchronization pulse means is a means for generating a code sequence that violates said charge constraints but not the minimum or maximum run length constraints of said encoding means.
Claim 7
Dependent Claim 47 words
The error correction system of claim 1 wherein said synchronizing pulses means includes means for providing a burst of non data pulses after each n data bytes used to calculate different check digits C1 and C2 and after n check bytes C1 and n check bytes C2.
Claim 8
Dependent Claim 25 words
The error correction system of claim 6 wherein said encoder means is for encoding said data and check digits in a zero modulation (ZM) code.
Claim 9
Dependent Claim 29 words
The error correction system of claim 7 wherein said synchronization pulse means includes means for generating an invalid ZM waveform pattern including the bits 00101000101000 or the bits 00010100010100.
Claim 10
Dependent Claim 20 words
The correction system of claim 6 including pointer means for detecting errors in said ZM coded data and check digits.

References Cited (Backward Citations)

US3623155A Cited
US3629824A Cited
US3697948A Cited
US3745526A Cited
US3851306A Cited
US3786439A Cited
US3800281A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-10-13 1979-04-14 1979-10-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-10-13 1983-04-14 1983-10-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-10-13 1987-04-14 1987-10-14 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag