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US3911463A Expired / Lapsed US ⏱️ 0.0 years remaining

Planar unijunction transistor

Assignee: General Electric Co
•
Filing: 1974-01-07
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Granted: 1975-10-07
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Expires: 1994-01-07
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Abstract

Abstract Disclosed is a semiconductor device comprising a body of semiconductor material that defines two major surfaces and is generally of a first type of conductivity. Formed in the body adjacent one of the major surfaces is a base one region that exhibits the first conductivity type but has a lower resistivity than the resistivity of the body. Also formed in the body adjacent the first surface and at varying distances from the base one region are several emitter regions that exhibit a second type of conductivity. A restraining region is formed in the body contiguous with the base one region at least on the sides thereof nearest the several emitter regions. The restraining region exhibits the second type of conductivity and prevents the spreading of the base one region in the direction of the emitter regions. The portion of the body adjacent the second major surface forms a base two region. Appropriate contacts are provided to connect the semiconductor device to an external circuit. Following fabrication, the device is tested and the emitter region that provides the desired device characteristics is chosen as the emitter for the finished device. In a preferred embodiment disclosed herein the major surface adjacent the base one and emitter contacts is covered with a thin insulative layer and a metallic field relief electrode overlies a portion of that layer between the base one region from the several emitter contacts. Biasing for the field relief plate is provided by extending the plate to a point near the periphery of the major surface upon which it lies and establishing ohmic contact between the semiconductor body near the periphery of the surface and the field relief plate.

Inventors

  • 👤 Jr Clifford O Hull
  • 👤 Leland F Leinweber
  • 👤 Iii William H Sahm
  • 👤 James W Sprague

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 19:23
CPC Classifications
H; H10; H10D; H10D99/00; H10D48/00; H10D48/30; H10D48/32; H10D48/36

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 162 words
A SEMICONDUCTOR DEVICE COMPRISING: A BODY OF SEMICONDUCTOR MATERIAL DEFINING TWO MAJOR SURFACES, SAID BODY EXHIBITING A FIRST CONDUCTIVITY TYPE, A BASE ONE REGION FORMED IN SAID BODY ADJACENT ONE OF SAID MAJOR SURFACES, SAID BASE ONE REGION BEING OF THE FIRST CONDUCTIVITY TYPE AND EXHIBITING A LOWER RESISTIVITY THAN THE RESISTIVITY OF THE BULK OF SAID BODY, A PLURALITY OF EMITTER REGIONS FORMED IN SAID BODY ADJACENT SAID ONE MAJOR SURFACE, SAID EMITTER REGIONS BEING OF A SECOND CONDUCTIVITY TYPE AND WHEREIN THE SPACINGS BETWEEN SAID EMITTER REGIONS AND SAID BASE ONE REGION ARE DIFFERENT, A RESTRAINING REGION FORMED IN SAID BODY ADJACENT SAID ONE MAJOR SURFACE AND CONTIGUOUS WITH SAID BASE ONE REGION AND SITUATED BETWEEN SAID BASE ONE REGION AND SAID EMITTER REGIONS, SAID RESTRAINING REGION BEING OF THE SECOND CONDUCTIVITY TYPE AND RESTRAINING THE SPREADING OF SAID BASE ONE REGION DURING OPERATION OF SAID SEMICONDUCTOR DEVICE, AND WHEREIN A PORTION OF SAID BODY COMPRISES A BASE TWO REGION.
Claim 2
Dependent Claim 162 words
A SEMICONDUCTOR DEVICE COMPRISING: A BODY OF SEMICONDUCTOR MATERIAL DEFINING TWO MAJOR SURFACES, SAID BODY EXHIBITING A FIRST CONDUCTIVITY TYPE, A BASE ONE REGION FORMED IN SAID BODY ADJACENT ONE OF SAID MAJOR SURFACES, SAID BASE ONE REGION BEING OF THE FIRST CONDUCTIVITY TYPE AND EXHIBITING A LOWER RESISTIVITY THAN THE RESISTIVITY OF THE BULK OF SAID BODY, A PLURALITY OF EMITTER REGIONS FORMED IN SAID BODY ADJACENT SAID ONE MAJOR SURFACE, SAID EMITTER REGIONS BEING OF A SECOND CONDUCTIVITY TYPE AND WHEREIN THE SPACINGS BETWEEN SAID EMITTER REGIONS AND SAID BASE ONE REGION ARE DIFFERENT, A RESTRAINING REGION FORMED IN SAID BODY ADJACENT SAID ONE MAJOR SURFACE AND CONTIGUOUS WITH SAID BASE ONE REGION AND SITUATED BETWEEN SAID BASE ONE REGION AND SAID EMITTER REGIONS, SAID RESTRAINING REGION BEING OF THE SECOND CONDUCTIVITY TYPE AND RESTRAINING THE SPREADING OF SAID BASE ONE REGION DURING OPERATION OF SAID SEMICONDUCTOR DEVICE, AND WHEREIN A PORTION OF SAID BODY COMPRISES A BASE TWO REGION.
Claim 3
Dependent Claim 88 words
A semiconductor device according to claim 1 further comprising a metallic base two contact adjacent a substantial portion of the other one of said major surfaces, a plurality of metallic emitter contacts, one of said emitter contacts covering the portion of said one major surface that is contiguous with each of said emitter regions, and a metallic base one contact covering the portion of said one major surface adjacent said base one region and said restraining region thus electrically connecting said base one region and said restraining region.
Claim 4
Dependent Claim 69 words
A semiconductor device according to claim 1 further comprising coupling means for coupling said device to an external circuit, said coupling means comprising a base two coupling means in an electrically conductive relationship with said base two region, base one coupling means in an electrically conductive relationship with said base one region, and emitter coupling means in an electrically conductive relationship with at least one of said emitter regions.
Claim 5
Dependent Claim 49 words
A semiconductor device according to claim 3 wherein said base two region comprises the region of said body adjacent the other one of said major surfaces and said base two coupling means comprises a layer of gold with a dopant of the first type on said other major surface.
Claim 6
Dependent Claim 67 words
A semiconductor device according to claim 4 further comprising a thin layer of insulative material overlying substantially all portions of said one major surface except those portions contiguous with said base one region, said restraining region and said several emitter regions, said device further comprising a metallic field relief plate overlying said insulative material on the portions separating said base one region and said several emitter regions.
Claim 7
Dependent Claim 49 words
A semiconductor device according to claim 5 wherein said layer of insulative material comprises a layer of semiconductor oxide and wherein a portion of said field relief plate extends to a point near the periphery of said one major surface and contacts said one major surface at said point.
Claim 8
Dependent Claim 15 words
A semiconductor device according to claim 6 wherein said two major surfaces are substantially parallel.
Claim 9
Dependent Claim 23 words
A semiconductor device according to claim 6 wherein said first conductivity type is N conductivity and said second conductivity type is P conductivity.
Claim 10
Dependent Claim 24 words
A semiconductor device according to claim 6 wherein said restraining region is a closed loop and surrounds a portion of said base one region.
Claim 11
Dependent Claim 14 words
A semiconductor device according to claim 6 wherein said device comprises a unijunction transistor.
Claim 12
Dependent Claim 67 words
A semiconductor device according to claim 1 further comprising a thin layer of insulative material overlying substantially all portions of said one major surface except those portions contiguous with said base one region, said restraining region and said several emitter regions, said device further comprising a metallic field relief plate overlying said insulative material on the portions separating said base one region and said several emitter regions.
Claim 13
Dependent Claim 49 words
A semiconductor device according to claim 11 wherein said layer of insulative material comprises a layer of semiconductor oxide and wherein a portion of said field relief plate extends to a point near the periphery of said one major surface and contacts said one major surface at said point.

References Cited (Backward Citations)

US3302076A Cited
US3405329A Cited
US3463977A Cited
US3436617A Cited
US3617828A Cited
US3601668A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-10-06 1979-04-07 1979-10-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-10-06 1983-04-07 1983-10-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-10-06 1987-04-07 1987-10-07 $7700.00 Window Closed / Lapsed

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