US3909810A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Bubble memory minor loop redundancy scheme
Assignee: Texas Instruments Inc
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Filing: 1974-02-25
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Granted: 1975-09-30
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Expires: 1994-02-25
Abstract
Abstract A redundancy bubble memory system comprising data chips having a major-minor loop organization wherein the system may include data chips having one or more faulty minor loops. A flag chip of similar organization is driven and data detected therefrom concurrently with the data chips to prevent faulty loops on the data chips from being read and from being used for data storage. The use of the flag chips in this fashion provides use of a large number of fabricated data chips that would otherwise have to be discarded.
Inventors
- 👤 Rex A Naden
- 👤 Jr Forrest G West
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 07:46
CPC Classifications
G; G11; G11C; G11C29/00; G11C29/70; G11C29/86; G11C19/00; G11C19/02; G11C19/08; G11C19/0875
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
178 words
A bubble memory system, comprising a data chip including a major propagation path means, a plurality of minor loops, at least one of which is faulty, transfer means for each minor loop for transferring information bubbles to and from said minor loops and said major path means; a flag chip including a flag major bubble propagation path means, a plurality of flag minor loops, and transfer means for each flag minor loop for transferring bubbles to and from said flag minor loops and said flag major path means rotating in-plane magnetic field means for propagating bubbles along said major path means for said data chip and said flag chip and said flag chip and around said loops; means for effecting bubble transfer through said transfer means; and detector means connected to said flag major path means for the serial detection of bubbles thereon, a detection of a bubble on said flag major path means corresponding to a flag minor loop emanating said bubble indicating a fault in the data chip minor loop corresponding to said flag minor loop.
Claim 2
Dependent Claim
178 words
A bubble memory system, comprising a data chip including a major propagation path means, a plurality of minor loops, at least one of which is faulty, transfer means for each minor loop for transferring information bubbles to and from said minor loops and said major path means; a flag chip including a flag major bubble propagation path means, a plurality of flag minor loops, and transfer means for each flag minor loop for transferring bubbles to and from said flag minor loops and said flag major path means rotating in-plane magnetic field means for propagating bubbles along said major path means for said data chip and said flag chip and said flag chip and around said loops; means for effecting bubble transfer through said transfer means; and detector means connected to said flag major path means for the serial detection of bubbles thereon, a detection of a bubble on said flag major path means corresponding to a flag minor loop emanating said bubble indicating a fault in the data chip minor loop corresponding to said flag minor loop.
Claim 3
Dependent Claim
38 words
A bubble memory system as set forth in claim 1, wherein said major path means for said data chip comprises a major loop and said flag major path means for said flag chip comprises a flag major loop.
Claim 4
Dependent Claim
22 words
A bubble memory system as described in claim 2, wherein each of said flag minor loops has a one-but flag data capacity.
Claim 5
Dependent Claim
60 words
A bubble memory system as described in claim 2, and including read means connected to said data chip major loop and to said detector means, an indication of a minor loop fault from said detector means to said read means being effective to permit data from said faulty data chip minor loop to be disregarded in favor of subsequent data.
Claim 6
Dependent Claim
60 words
A bubble memory system as described in claim 2, and including write means connected to said data chip major loop and to said detector means, an indication of a minor loop fault from said detector means preventing said write means from inserting data into the data position corresponding to said faulty data chip minor loop in favor of later insertion.
Claim 7
Dependent Claim
117 words
A bubble memory system as described in claim 2, and including read means connected to said data chip major loop and to said detector means, an indication of a minor loop fault from said detector means to said read means being effective to permit data from said faulty data chip minor loop to be disregarded in favor of subsequent data, delay means connected to said detector means, and write means connected to said data chip major loop and to said delay means, an indication of a minor loop fault from said detector means preventing said write means from inserting data into the data position corresponding to said faulty data chip minor loop in favor of later insertion.
Claim 8
Dependent Claim
166 words
A bubble memory system as described in claim 2, and including read means connected to said data chip major loop and to said detector means, an indication of a minor loop fault from said detector means to said read means being effective to permit data from said faulty data chip minor loop to be disregarded in favor of subsequent data, second detector means connected to said flag major loop subsequent to said read means for the serial detection of bubbles thereon, a detection of a bubble from Said flag major loop corresponding to a flag minor loop emanating said bubble indicating a fault in the data chip minor loop corresponding to said flag minor loop, and write means connected to said data chip major loop and to said second detector means, an indication of a minor loop fault from said detector means preventing said write means from inserting data into the data position corresponding to said faulty data chip minor loop in favor of later insertion.
Claim 9
Dependent Claim
232 words
A bubble memory system including a plurality of data chips, each of said data chips including a major bubble propagation path means, a plurality of minor loops, and transfer means for each minor loop for transferring information bubbles to and from said minor loop and said major path means, a flag chip including a flag major bubble propagation path means, a plurality of flag minor loops, and transfer means for each flag minor loop for transferring bubbles to and from said flag minor loops and said flag major path means; rotating in-plane magnetic field means for propagating bubbles along said major path means for each of said data chips and said flag chip and around said loops; means for effecting bubble transfers through said transfer means; and detector means connected to said major path means and said flag major path means for the serial detection of bubbles on each of said major path means and said flag major path means corresponding to the insertion thereof of data from said minor loops, the detection of a bubble in said flag major path means, which corresponds to a specific flag minor loop, causing said detector means to disregard data from any one of said major path means corresponding to data chip minor loops that are related to said specific flag minor loop, at least one of said related data chip minor loops being faulty.
Claim 10
Dependent Claim
232 words
A bubble memory system including a plurality of data chips, each of said data chips including a major bubble propagation path means, a plurality of minor loops, and transfer means for each minor loop for transferring information bubbles to and from said minor loop and said major path means, a flag chip including a flag major bubble propagation path means, a plurality of flag minor loops, and transfer means for each flag minor loop for transferring bubbles to and from said flag minor loops and said flag major path means; rotating in-plane magnetic field means for propagating bubbles along said major path means for each of said data chips and said flag chip and around said loops; means for effecting bubble transfers through said transfer means; and detector means connected to said major path means and said flag major path means for the serial detection of bubbles on each of said major path means and said flag major path means corresponding to the insertion thereof of data from said minor loops, the detection of a bubble in said flag major path means, which corresponds to a specific flag minor loop, causing said detector means to disregard data from any one of said major path means corresponding to data chip minor loops that are related to said specific flag minor loop, at least one of said related data chip minor loops being faulty.
Claim 11
Dependent Claim
42 words
A bubble memory system as set forth in claim 8, wherein said major path means for each of said plurality of data chips comprises a major loop and said flag major path means for said flag chip comprises a flag major loop.
References Cited (Backward Citations)
US3737882A
Cited
US3792450A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-09-29 | 1979-03-31 | 1979-09-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-09-29 | 1983-03-31 | 1983-09-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-09-29 | 1987-03-31 | 1987-09-30 | $7700.00 | Window Closed / Lapsed |