Digital AGC for playback of digitally recorded data

Claim 2

A digital AGC system for displaying electrical signals from a signal source, said signals having a wide dynamic range and a time-varying decay rate, consecutive samples of said signals being digitally represented by a series of consecutive floatingpoint numbers, each floating-point number consisting of an algebraic sign, a mantissa and an exponent to a base, the system including: means to receive and to low-pass filter the absolute values of the exponents of selected ones of said consecutive floating point numbers thereby to generate from the filtered exponents corresponding exponential multipliers determined with respect to a preselected base; means to receive and to denormalize the signed mantissas of said consecutive floating point numbers; and means to multiply the signed denormalized mantissas by the exponential multipliers corresponding to said consecutive floating-point numbers.

Claim 3

A digital AGC system for displaying electrical signals from a signal source, said signals having a wide dynamic range and a time-varying decay rate, consecutive samples of said electrical signals being digitally represented by a series of consecutive floating-point numbers, each floating point number consisting of an algebraic sign, a mantissa, and an exponent to a base, the system including: low-pass filter means having an input and an output, the filter receiving the absolute values of the exponents of selected ones of said consecutive floating-point numbers and the filter providing to its output filtered values of the respective exponents, said filtered values defining exponential multipliers determined with respect to a preselected base; denormalizer means having an input and an output, said denormalizer receiving at its input the signed mantissas of said consecutive floating-point numbers and providing to its output denormalized signed mantissas; and multiplier means to multiply the outputs of said denormalizer by the corresponding outputs of said low-pass filter to thereby form logarithmically compressed digital products.

Claim 4

A digital AGC system for displaying electrical signals from a signal source, said signals having a wide dynamic range and a time-varying decay rate, consecutive samples of said electrical signals being digitally represented by a series of consecutive floating-point numbers, each floating point number consisting of an algebraic sign, a mantissa, and an exponent to a base, the system including: low-pass filter means having an input and an output, the filter receiving the absolute values of the exponents of selected ones of said consecutive floating-point numbers and the filter providing to its output filtered values of the respective exponents, said filtered values defining exponential multipliers determined with respect to a preselected base; denormalizer means having an input and an output, said denormalizer receiving at its input the signed mantissas of said consecutive floating-point numbers and providing to its output denormalized signed mantissas; and multiplier means to multiply the outputs of said denormalizer by the corresponding outputs of said low-pass filter to thereby form logarithmically compressed digital products.

Claim 5

A digital AGC apparatus for displaying electrical output signals from a signal source, said signals having a wide dynamic range and a time-varying decay rate, consecutive samples of sAid signals being quantized as a series of corresponding floating-point numbers consisting of an algebraic sign, an exponent to a base, and a mantissa, the apparatus including: an assembly register having a sign bit position, an exponent field, and a mantissa field, said register being interconnected with said signal source, to receive consecutive floating point signal samples; a denormalizer means having a shift-control input and an output, the denormalizer being interconnected with the sign bit position and the mantissa field of said assembly register; a counter interconnected with the exponent field of said assembly register and with the shift control input of said denormalizer means; an exponent register having an output, the register being interconnected with the exponent field of said assembly register, and said exponent register being adapted to receive the absolute values of the exponents of said consecutive signal samples; low-pass filter means having an input and an output; a gating means interconnected with the output of said exponent register and the input of said low-pass filter; sub-sample clock means connected with said gating means to clock the absolute values of selected ones of said consecutive exponents from the exponent register to the input of said low-pass filter to generate at the output of said filter consecutive quanta defining exponential multipliers corresponding to the consecutive signal samples, said exponential multipliers being determined with respect to a preselected base; and a multiplier means having first and second inputs and an output, the first input being connected to the output of said denormalizer means, the second input being connected to the output of said low-pass filter, said multiplier being adapted to multiply consecutive denormalized mantissas by the corresponding exponential multipliers to thereby form logarithmically compressed digital products.

Claim 6

A digital AGC apparatus for displaying electrical output signals from a signal source, said signals having a wide dynamic range and a time-varying decay rate, consecutive samples of sAid signals being quantized as a series of corresponding floating-point numbers consisting of an algebraic sign, an exponent to a base, and a mantissa, the apparatus including: an assembly register having a sign bit position, an exponent field, and a mantissa field, said register being interconnected with said signal source, to receive consecutive floating point signal samples; a denormalizer means having a shift-control input and an output, the denormalizer being interconnected with the sign bit position and the mantissa field of said assembly register; a counter interconnected with the exponent field of said assembly register and with the shift control input of said denormalizer means; an exponent register having an output, the register being interconnected with the exponent field of said assembly register, and said exponent register being adapted to receive the absolute values of the exponents of said consecutive signal samples; low-pass filter means having an input and an output; a gating means interconnected with the output of said exponent register and the input of said low-pass filter; sub-sample clock means connected with said gating means to clock the absolute values of selected ones of said consecutive exponents from the exponent register to the input of said low-pass filter to generate at the output of said filter consecutive quanta defining exponential multipliers corresponding to the consecutive signal samples, said exponential multipliers being determined with respect to a preselected base; and a multiplier means having first and second inputs and an output, the first input being connected to the output of said denormalizer means, the second input being connected to the output of said low-pass filter, said multiplier being adapted to multiply consecutive denormalized mantissas by the corresponding exponential multipliers to thereby form logarithmically compressed digital products.

Claim 7

The apparatus of claim 3, wherein said low-pass filter is a digital differential analyzer.

Claim 8

The apparatus of claim 4, wherein said subsample clock means has fast, medium and slow subsample clock rates.

Claim 9

The apparatus of claim 5, wherein, the preselected number-base is the same as the number-base of the floating-point numbers.

Claim 10

The apparatus of claim 5 wherein, the preselected number-base is less than the number-base of the floating point numbers.

Claim 11

The apparatus of claim 7, and further including; time-release means connected to said sub-sample clock means, and level detector means interconnected between the output of said multiplier means and with said sub-sample clock means to automatically adjust the sub-sample clock rate in accordance with the rate of change of the decay of the electrical signal.

Claim 12

The apparatus of claim 8, and further including: digital-to-analog converter means connected to the output of said multiplier means to convert said digital products to an analog signal; and display means for displaying said analog signal.