US3906376A
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US
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Synchronous differentially coherent PSK demodulation
Assignee: Boeing North American Inc
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Filing: 1974-06-03
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Granted: 1975-09-16
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Expires: 1994-06-03
Abstract
Abstract A synchronous differentially coherent PSK communication signal is demodulated by applying the signal to a phase lock loop circuit whose output is sampled once every bit period in accordance with a sample control signal which is generated each time phase lock is lost as a result of the change in phase of the communication signal, as determined by comparing the phase of the communication signal with that of the phase lock loop tracking signal, phase lock being lost and restored during each bit period.
Inventors
- 👤 Larry F Bass
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 11:39
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/18; H04L27/22; H04L27/227; H04L27/2271; H04L27/2272; H04L27/20; H04L27/2032; H04L27/2053; H04L27/206; H04L27/2067; H04L27/2078
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
153 words
A demodulator for demodulating a synchronous differentially coherent PSK communication signal wherein the modulation phase shift is phi , comprising: phase lock loop circuit means for receiving the communication signal and generating in response thereto a tracking signal which differs in phase therefrom by an amount phi once phase lock is achieved and for providing a D.C. analog output linearly proportional to the phase difference between the communication and tracking signal and wherein phase lock is lost at the beginning but restored prior to the end of each bit period of the communication signal; sample control circuit means for detecting each time phase lock is lost and generating in response thereto a sample control signal; and sample and hold circuit means responsive to the sample control signal for sampling the D.C. analog output of said phase lock loop circuit means and holding the sampled value until receipt of the next sample control signal.
Claim 2
Dependent Claim
153 words
A demodulator for demodulating a synchronous differentially coherent PSK communication signal wherein the modulation phase shift is phi , comprising: phase lock loop circuit means for receiving the communication signal and generating in response thereto a tracking signal which differs in phase therefrom by an amount phi once phase lock is achieved and for providing a D.C. analog output linearly proportional to the phase difference between the communication and tracking signal and wherein phase lock is lost at the beginning but restored prior to the end of each bit period of the communication signal; sample control circuit means for detecting each time phase lock is lost and generating in response thereto a sample control signal; and sample and hold circuit means responsive to the sample control signal for sampling the D.C. analog output of said phase lock loop circuit means and holding the sampled value until receipt of the next sample control signal.
Claim 3
Dependent Claim
46 words
The demodulator of claim 1 wherein said sample control circuit means includes means for measuring the phase difference between the communication and tracking signals and for generating a timing signal to which the sample control signal is responsive whenever the phase difference deviates from phi .
Claim 4
Dependent Claim
73 words
The demodulator of claim 2 wherein said phase difference measuring means includes phase shift means for shifting the phase of the communication signal with respect to the tracking signal by an amount phi in a direction so that upon achieving phase lock the shifted and unshifted signals are in phase and phase comparator means for comparing the phase of the two so as to generate a timing signal whenever these phases are different.
Claim 5
Dependent Claim
44 words
The demodulator of claim 2 including time delay circuit means for generating the sample control signal after a prescribed time interval following receipt of the timing signal which is at least equal to the D.C. analog response time of said phase lock loop circuit.
Claim 6
Dependent Claim
9 words
The demodulator of claim 1 wherein phi is 90*.
Claim 7
Dependent Claim
34 words
The demodulator of claim 1 wherein said sample and hold circuit means includes threshold detector circuit means through which the D.C. analog is sampled so as to always provide a bilevel signal for sampling.
Claim 8
Independent Claim
142 words
A method for demodulating a synchronous differentially coherent PSK communication signal wherein the modulation phase shift is phi comprising: generating a tracking signal which follows the phase of the communication signal so as to maintain a phase difference of phi therebetween constituting phase lock, said phase lock being lost at the beginning but being restored prior to the end of each communication signal bit period. generating a bipolar signal wherein one polarity denotes that the phase of the communication signal leads that of the tracking signal and the other polarity denotes that the communication signal phase lags that of the tracking signal; detecting each time phase lock is lost and generating in response thereto a sample control signal, and in response to the sample control signal, sampling the bipolar signal and holding the sampled value until the next sample control signal occurs.
Claim 9
Independent Claim
142 words
A method for demodulating a synchronous differentially coherent PSK communication signal wherein the modulation phase shift is phi comprising: generating a tracking signal which follows the phase of the communication signal so as to maintain a phase difference of phi therebetween constituting phase lock, said phase lock being lost at the beginning but being restored prior to the end of each communication signal bit period. generating a bipolar signal wherein one polarity denotes that the phase of the communication signal leads that of the tracking signal and the other polarity denotes that the communication signal phase lags that of the tracking signal; detecting each time phase lock is lost and generating in response thereto a sample control signal, and in response to the sample control signal, sampling the bipolar signal and holding the sampled value until the next sample control signal occurs.
Claim 10
Dependent Claim
33 words
The method of claim 7 wherein loss of phase lock is detected by measuring the phase difFerence between the communication and tracking signals to determine whenever the phase difference deviates from phi .
Claim 11
Dependent Claim
58 words
The method of claim 8 wherein the phase difference measurement is performed by shifting the phase of either the communication or tracking signal by an amount phi in a direction so that upon achieving phase lock the shifted and unshifted signals are in phase and generating a timing signal whenever the shifted and unshifted signals have different phases.
Claim 12
Dependent Claim
9 words
The method of claim 7 wherein phi is 90*.
Claim 13
Dependent Claim
18 words
The method of claim 7 wherein the bipolar signal is converted to a bilevel signal before being sampled.
Claim 14
Dependent Claim
35 words
The method of claim 7 wherein the sample control signal is delayed a prescribed time interval in response to the timing signal which is at least equal to the response time for the bipolar signal.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-09-15 | 1979-03-17 | 1979-09-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-09-15 | 1983-03-17 | 1983-09-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-09-15 | 1987-03-17 | 1987-09-16 | $7700.00 | Window Closed / Lapsed |