US3906210A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Device for extracting the square root of a binary number
Assignee: Telediffusion de France ets Public de Diffusion
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Filing: 1974-05-07
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Granted: 1975-09-16
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Expires: 1994-05-07
Abstract
Abstract A device for extracting the square root of a binary number, comprising an input shift register receiving the successive digits of the said number from which successive groups of two consecutive digits are extracted and momentarily stored in two unitary memories under the control of a time base. The successive groups are applied to an adder and to a selector circuit. The adder also receives signals from an intermediate register displaying the already found digits of the wanted square root. The selector circuit delivers different signals according to the value of the last found digits of the root. The output of the adder accordingly controls the intermediate register which in turn controls an answer register displaying the digits of the root.
Inventors
- 👤 Lucien E Mignot
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 17:22
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/38; G06F7/48; G06F7/544; G06F7/552; G06F7/5525
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
297 words
Apparatus for the extraction of the square root of a given binary number having 2(n+1) digits, comprising: means including an input shift register controlled by a time base for recording said given binary number and for successively extracting (n+1) two-digit groups from said given binary number; two unitary memories for storing said extracted two-digit groups; an intermediate shift register recording in succession the found digits of the square root; means controlled by said intermediate register for building up a first further binary number having (n+3) digits which, starting from the zero weight binary digit, are two ''''ones'''', then the complements to the already found digits of the square root, and finally ones; an adder adding said first further binary number to a second further binary number; a selector circuit receiving a first auxiliary binary number from said adder and a second auxiliary binary number; said second further binary number being formed by the output number from said selector circuit, the digits of which have been shifted two binary places to the upper weight end and the two digit places on the zero weight end of which are a group of two digits of said given binary number which is received from said unitary memories; said selector circuit including means for selecting said first auxiliary number from said adder when the last preceeding found digit of the square root is a one and also including means for selecting said second auxiliary number when the last preceeding found digit of the square root is a ''''zero''''; and, means for feeding the successive carry forwards of the addition from the adder to said intermediate register whereby the digits of the wanted square root are obtained as these successive carry forwards in addition to said first and second further binary numbers.
Claim 2
Dependent Claim
297 words
Apparatus for the extraction of the square root of a given binary number having 2(n+1) digits, comprising: means including an input shift register controlled by a time base for recording said given binary number and for successively extracting (n+1) two-digit groups from said given binary number; two unitary memories for storing said extracted two-digit groups; an intermediate shift register recording in succession the found digits of the square root; means controlled by said intermediate register for building up a first further binary number having (n+3) digits which, starting from the zero weight binary digit, are two ''''ones'''', then the complements to the already found digits of the square root, and finally ones; an adder adding said first further binary number to a second further binary number; a selector circuit receiving a first auxiliary binary number from said adder and a second auxiliary binary number; said second further binary number being formed by the output number from said selector circuit, the digits of which have been shifted two binary places to the upper weight end and the two digit places on the zero weight end of which are a group of two digits of said given binary number which is received from said unitary memories; said selector circuit including means for selecting said first auxiliary number from said adder when the last preceeding found digit of the square root is a one and also including means for selecting said second auxiliary number when the last preceeding found digit of the square root is a ''''zero''''; and, means for feeding the successive carry forwards of the addition from the adder to said intermediate register whereby the digits of the wanted square root are obtained as these successive carry forwards in addition to said first and second further binary numbers.
Claim 3
Dependent Claim
63 words
Apparatus for extracting the square root of a given binary number as claimed in claim 1, further comprising a clock circuit furnishing two phases per cycle, the first phase controlling said means for building up said first binary number, said selector circuit and said two unitary memories linked with the input register, and the second phase controlling said memory linked with said adder.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-09-15 | 1979-03-17 | 1979-09-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-09-15 | 1983-03-17 | 1983-09-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-09-15 | 1987-03-17 | 1987-09-16 | $7700.00 | Window Closed / Lapsed |