US3903365A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Synchronizing separator circuit
Assignee: Sanyo Electric Co Ltd
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Filing: 1974-02-28
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Granted: 1975-09-02
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Expires: 1994-02-28
Abstract
Abstract A synchronizing signal separator circuit in a television apparatus such as a television receiver corrects the distortion of a composite video signal including a synchronizing signal component, before amplitude-separating the corrected composite video signal to derive the synchronizing signal component. For this purpose, a peak value of the synchronizing signal component in the composite video signal is detected to derive the envelope of the peak value. The envelope is then inverted and added to the composite video signal. In a preferred embodiment, a direct current closed loop includes means for detecting the peak value of the synchronizing signal component and deriving the envelope thereof and variable impedance means connected in shunt with a d.c. signal path conducting the composite video signal, which responds to the envelope of the peak value as a control voltage to vary the impedance as a function of variations in the value of the peak envelope. As a result, the waveform of the peak amplitudes of the synchronizing signal component is leveled.
Inventors
- 👤 Takeshi Arai
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 17:33
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/04; H04N5/08
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
261 words
A circuit for use in a television receiver, comprising: means for amplifying said composite video signal and producing an amplified composite video signal output, a direct current signal path for receiving and transferring said amplified composite video signal output of said amplifying means, a direct current closed loop comprising rectifying means, a low pass filter, variable impedance means, and controlling means, said rectifying means being connected to said direct current signal path to receive said amplified composite video signal therefrom and to rectify said amplified composite video signal and provide an output corresponding to the peak value of the synchronizing signal component of said amplified, composite video signal, said low pass filter being coupled to said rectifying means to receive said output thereof and provide an output representative of the envelope of the peak value of said synchronizing component of said composite video signal, said controlling meanS receiving said envelope output of said low pass filter and applying said envelope output as a control voltage to said variable impedance means, and said variable impedance means being connected to shunt with said direct current signal path and being responsive to said control voltage supplied thereto by said controlling means to vary the impedance value thereof as a function of said control voltage, thereby to compensate for amplitude variation distortions of said composite video signal transferred on said direct current signal path, and means coupled to said direct current path for receiving said compensated composite video signal from said path and amplitude separating said synchronizing signal component from said compensated composite video signal.
Claim 2
Dependent Claim
261 words
A circuit for use in a television receiver, comprising: means for amplifying said composite video signal and producing an amplified composite video signal output, a direct current signal path for receiving and transferring said amplified composite video signal output of said amplifying means, a direct current closed loop comprising rectifying means, a low pass filter, variable impedance means, and controlling means, said rectifying means being connected to said direct current signal path to receive said amplified composite video signal therefrom and to rectify said amplified composite video signal and provide an output corresponding to the peak value of the synchronizing signal component of said amplified, composite video signal, said low pass filter being coupled to said rectifying means to receive said output thereof and provide an output representative of the envelope of the peak value of said synchronizing component of said composite video signal, said controlling meanS receiving said envelope output of said low pass filter and applying said envelope output as a control voltage to said variable impedance means, and said variable impedance means being connected to shunt with said direct current signal path and being responsive to said control voltage supplied thereto by said controlling means to vary the impedance value thereof as a function of said control voltage, thereby to compensate for amplitude variation distortions of said composite video signal transferred on said direct current signal path, and means coupled to said direct current path for receiving said compensated composite video signal from said path and amplitude separating said synchronizing signal component from said compensated composite video signal.
Claim 3
Dependent Claim
27 words
A signal processing circuit as recited in claim 1 wherein said low pass filter has a cut-off frequency lower than the line frequency of said television receiver.
Claim 4
Dependent Claim
29 words
A signal processing circuit as recited in claim 1 wherein said low pass filter has a cut-off frequency lower than one-fiftieth of the line frequency of said television receiver.
Claim 5
Dependent Claim
26 words
A signal processing circuit as recited in claim 1 wherein said variable impedance means comprises a transistor connected in parallel with said direct current signal path.
Claim 6
Dependent Claim
74 words
A signal processing circuit as recited in claim 4 wherein said controlling means comprises: an emitter follower transistor for receiving the envelope output of said low pass filter, and a direct current circuit including a resistor connected in series with the output of said emitter follower transistor and with the input of said parallel connected transistor to provide said envelope output of said low pass filter as an input to said parallel connected transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1978-09-01 | 1979-03-03 | 1979-09-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1982-09-01 | 1983-03-03 | 1983-09-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1986-09-01 | 1987-03-03 | 1987-09-02 | $7700.00 | Window Closed / Lapsed |