Frequency/phase comparator

Claim 2

A frequency/phase comparator comprising: a. first input means for receiving a reference signal having a Predetermined frequency; b. second input means for receiving a variable frequency signal having a center frequency generally the same as the predetermined frequency; c. logic circuitry connected to said first and second input means and providing first, second and third trains of pulses in response to the reference and variable frequency signals; d. first, second and third gating means connected to said logic circuitry for operation in response to pulses in the first, second and third trains of pulses, respectively; e. voltage storage means connected through said first gating means to voltage supply input means, said pulses in the first train each operating said first gating means to connect said voltage storage means to said voltage supply means for a period of time proportional to the amount the reference signal leads the variable frequency signal in phase; f. said second gating means being connected to said voltage storage means and operating in response to the pulses in the second train to sample the amplitude of voltage stored in said voltage storage means; and g. said third gating means being connected to said voltage storage means and operating in response to the pulses in the third train to remove the voltage stored in the voltage storage means.

Claim 3

A frequency/phase comparator comprising: a. logic circuitry having a first input for receiving reference pulses at a predetermined frequency and a second input for receiving variable frequency pulses with a center frequency generally the same as the predetermined frequency, said logic circuitry further having a first output providing pulses having a width proportional to the amount each reference pulse leads each variable frequency pulse in phase, a second output providing a pulse for each variable frequency pulse applied to the second input and a third output providing a pulse subsequent to each of the pulses at the second output; b. voltage storage means; c. first gating means having a control terminal coupled to the first output of said logic circuitry, an input terminal coupled to voltage supply input means and an output terminal coupled to said voltage storage means for allowing said voltage storage means to store a voltage having an amplitude proportional to the width of the pulses applied to the control terminal; d. second gating means having a control terminal coupled to the second output of said logic circuitry, an input terminal coupled to said voltage storage means and an output terminal coupled to output means for supplying a sample of the voltage stored in said voltage storage means to said output means for each pulse applied to the control terminal of said second gating means; and e. third gating means having a control terminal coupled to the third output of said logic circuitry, an input terminal coupled to said voltage storage means and an output terminal coupled to a reference point for removing the voltage stored in said voltage storage means each time a pulse is applied to the control terminal of said third gating means.

Claim 4

A frequency/phase comparator comprising: a. logic circuitry having a first input for receiving reference pulses at a predetermined frequency and a second input for receiving variable frequency pulses with a center frequency generally the same as the predetermined frequency, said logic circuitry further having a first output providing pulses having a width proportional to the amount each reference pulse leads each variable frequency pulse in phase, a second output providing a pulse for each variable frequency pulse applied to the second input and a third output providing a pulse subsequent to each of the pulses at the second output; b. voltage storage means; c. first gating means having a control terminal coupled to the first output of said logic circuitry, an input terminal coupled to voltage supply input means and an output terminal coupled to said voltage storage means for allowing said voltage storage means to store a voltage having an amplitude proportional to the width of the pulses applied to the control terminal; d. second gating means having a control terminal coupled to the second output of said logic circuitry, an input terminal coupled to said voltage storage means and an output terminal coupled to output means for supplying a sample of the voltage stored in said voltage storage means to said output means for each pulse applied to the control terminal of said second gating means; and e. third gating means having a control terminal coupled to the third output of said logic circuitry, an input terminal coupled to said voltage storage means and an output terminal coupled to a reference point for removing the voltage stored in said voltage storage means each time a pulse is applied to the control terminal of said third gating means.

Claim 5

A frequency/phase comparator as claimed in claim 2 wherein the voltage storage means includes a capacitor.

Claim 6

A frequency/phase comparator as claimed in claim 2 wherein each of the first, second and third gating means includes a semiconductor transmission gate.

Claim 7

A frequency/phase comparator as claimed in claim 2 wherein the output means includes a capacitor for storing sampled voltages.

Claim 8

A frequency/phase comparator as claimed in claim 2 wherein the logic circuitry includes a flip-flop having two inputs, connected to receive the reference pulses and the variable frequency pulses, respectively, and normal and inverted outputs and first and second coincidence circuits each having two inputs and an output, the inputs of said first coincidence circuit being coupled to receive the variable frequency pulses and the normal output of said flip-flop, respectively, and the output being coupled to the first output of said logic ciRcuitry, and the inputs of said second coincidence circuit being coupled to receive the variable frequency pulses and the inverted output of said flip-flop, respectively, and the output being coupled to the third output of said logic circuitry.

Claim 9

A frequency/phase comparator as claimed in claim 2 including in addition a plurality of flip-flops connected to form a divider circuit for receiving a reference signal and providing the reference pulses.

Claim 10

A frequency/phase comparator as claimed in claim 7 including additional logic circuitry providing set and reset pulses to predetermined ones of the flip-flops in response to a reference pulse leading a variable frequency pulse and a reference pulse lagging a variable frequency pulse for adjusting the phase of the next reference pulse to force the next reference pulse to appear at approximately the correct time to coincide with the center frequency of the variable frequency pulses.