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US3902127A Expired / Lapsed US ⏱️ 0.0 years remaining

Electronic circuit and technique for extracting a video signal from an array of photodetectors

Assignee: Ball Computer Products Inc
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Filing: 1973-11-29
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Granted: 1975-08-26
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Expires: 1993-11-29
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Abstract

Abstract A video extraction circuit suitable for a monolithic array of photodetectors which are sequentially connected through individual MOS gates one at a time in response to a clock switching signal to a common video signal line. The signal in the output video line is integrated over recurring periods wherein each integration period straddles in time the MOS gate switching clock pulse, with the output of the integrator being sampled once each integration period after the termination of its associated MOS switching clock pulse. The integrator is directly coupled to the photoarray video signal line and to an analog-to-digital converter. An overall extraction circuit is provided with a minimum number of components and a very high speed that is particularly adapted to rapid scanning of visual information by the array of photodetectors, such as in an optical-character reading system.

Inventors

  • 👤 Rosser S Wilson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 09:45
CPC Classifications
G; G06; G06V; G06V10/00; G06V10/10; G06V10/12

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 163 words
A video signal extraction circuit for use with a photodetector device having an array of individual photodetectors that are each connected to a common video output line through an individual semi-conductor element that is switchable from a normal non-conductive state to a conductive state for the duration of a gate signal and means applying the gate signal to each of said semi-conductor elements one at a time to render them each conductive for prescribed intervals with time therebetween when none of the semi-conductor elements are conductive, said video extraction circuit comprising: an integrator circuit having an input receiving a signal from the common video output line and an output, and means for resetting the integrator circuit during each period wherein none of the semi-conductor elements is conductive, in a manner that the integrator circuit is operative for a time between reset pulses that extends throughout each of said gate signals from an instant before to an instant after each of said gate signals.
Claim 2
Dependent Claim 163 words
A video signal extraction circuit for use with a photodetector device having an array of individual photodetectors that are each connected to a common video output line through an individual semi-conductor element that is switchable from a normal non-conductive state to a conductive state for the duration of a gate signal and means applying the gate signal to each of said semi-conductor elements one at a time to render them each conductive for prescribed intervals with time therebetween when none of the semi-conductor elements are conductive, said video extraction circuit comprising: an integrator circuit having an input receiving a signal from the common video output line and an output, and means for resetting the integrator circuit during each period wherein none of the semi-conductor elements is conductive, in a manner that the integrator circuit is operative for a time between reset pulses that extends throughout each of said gate signals from an instant before to an instant after each of said gate signals.
Claim 3
Dependent Claim 35 words
The video signal extraction circuit according to claim 1 which additionally comprises means for sampling said integrator output immediately preceding each of said integrator reset pulses but after the end of each said gating pulses.
Claim 4
Dependent Claim 33 words
The video signal extraction circuit according to claim 2 wherein said means for sampling the integrator output includes a Gray-code analog-to-digital encoder, whereby the output of said circuit is a Gray-code binary signal.
Claim 5
Dependent Claim 63 words
The video signal extraction circuit according to claim 1 wherein said integrating circuit includes a high gain amplifier with a capacitor connected from its output to its input, said amplifier having parallel amplification paths with one path responsive to low frequencies and the other path responsive to high frequencies, said paths being summed together to form said integrating circuit output after amplification thereof.
Claim 6
Dependent Claim 27 words
The video signal extraction circuit according to claim 1 wherein said integrator resetting means includes a semi-conductor switch employing a balanced bridge of matched hot carrier diodes.
Claim 7
Dependent Claim 35 words
The video signal extraction circuit according to claim 1 wherein said integrator circuit input is connected directly to the common video output line of the photodetector device without any active electronic elements being interposed therein.
Claim 8
Dependent Claim 30 words
The video signal extraction circuit according to claim 1 wherein said integrator circuit output is connected directly to an analog-to-digital converter with only a unity gain buffer amplifier interposed therebetween.

References Cited (Backward Citations)

US2922151A Cited
US3216005A Cited
US3316492A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1978-08-25 1979-02-24 1979-08-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1982-08-25 1983-02-24 1983-08-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1986-08-25 1987-02-24 1987-08-26 $7700.00 Window Closed / Lapsed

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