Circuit for protecting series-connected switches

Claim 2

In a circuit for preventing the rate of rise of voltage across each of first and second series-connected, alternatelyconducting power switches from exceeding a predetermined value, the combination of: first and second capacitance means for limiting the rate of rise of voltage across each power switch; means for connecting the first capacitance means across the first power switch; means for connecting the second capacitance means across the second power switch; voltage shifting means for transferring the charge on the first capacitance means to the second capacitance means when both power switches are non-conducting as a result of the turn-off of the second power switch and for transferring the charge on the second capacitance means to the first capacitance means when both power switches are non-conducting as a result of the turn-off of the first power switch.

Claim 3

In a circuit for limiting the rate of rise of voltage across first and second series-connected, alternately-conducting switching components, the combination of: first capacitance means for limiting the rate of rise of voltage across the first switching component; means for connecting the first capacitance means across the first power switching component; second capacitance means for limiting the rate of rise of voltage across the second switching component; means for connecting the second capacitance means across the second switching component; first discharging means for resonantly discharging the first capacitance means when the first capacitance means is charged and both of the series-connected switching components are non-conducting. second discharging means for resonantly discharging the second capacitance means when the second capacitance means is charged and both of the series-connected switching components are non-conducting; first charging means for resonantly charging the second capacitance means when the first discharging means discharges the first capacitance means; and second charging means for resonantly charging the first capacitance means when the second discharging means discharges the second capacitance means.

Claim 4

In a circuit for limiting the rate of rise of voltage across first and second series-connected, alternately-conducting switching components, the combination of: first capacitance means for limiting the rate of rise of voltage across the first switching component; means for connecting the first capacitance means across the first power switching component; second capacitance means for limiting the rate of rise of voltage across the second switching component; means for connecting the second capacitance means across the second switching component; first discharging means for resonantly discharging the first capacitance means when the first capacitance means is charged and both of the series-connected switching components are non-conducting. second discharging means for resonantly discharging the second capacitance means when the second capacitance means is charged and both of the series-connected switching components are non-conducting; first charging means for resonantly charging the second capacitance means when the first discharging means discharges the first capacitance means; and second charging means for resonantly charging the first capacitance means when the second discharging means discharges the second capacitance means.

Claim 5

A circuit as set forth in claim 2 wherein the first and second charging means include a transformer having a first winding connected to the first discharging means and to the first capacitance means and a second winding connected to the second discharging means and to the second capacitance means.

Claim 6

A circuit as set forth in claim 2, wherein the first charging means includes inductance means for resonantly charging the second capacitance means.

Claim 7

A circuit as set forth in claim 2, wherein the second charging means includes inductance means for resonantly charging the first capacitance means.

Claim 8

A circuit as set forth in claim 2, wherein the first charging means includes diode means for preventing the first charging current from flowing in a reverse direction.

Claim 9

A circuit as set forth in claim 2 wherein the second charging means includes diode means for preventing the second charging current from flowing in a reverse direction.

Claim 10

In a circuit for limiting the rate of rise of voltage across first and second series-connected, alternately-conducting switching components, the combination of: first capacitance means for limiting the rate of rise of voltage across the first switching component; means for connecting the first capacitance means across the first switching component; second capacitance means for limiting the rate of rise of voltage across the second switching component; means for connecting the second capacitance means across the second switching component; a transformer having first and second windings; a first charging path including the second capacitance means and the second winding; a second charging path including the first capacitance means and the first winding; a first discharging switch; a second discharging switch; a first discharging path including the first capacitance means, the first winding, and the first discharging switch, the first discharging switch serving as means for initiating the flow of current through the first discharging and charging paths; and a second discharging path including the second capacitance means, the second winding, and the second discharging switch, the second discharging switch serving as means for initiating the flow of current through the second discharging and charging paths.

Claim 11

In a circuit for limiting the rate of rise of voltage across first and second series-connected, alternately-conducting switching components, the combination of: first capacitance means for limiting the rate of rise of voltage across the first switching component; means for connecting the first capacitance means across the first switching component; second capacitance means for limiting the rate of rise of voltage across the second switching component; means for connecting the second capacitance means across the second switching component; a transformer having first and second windings; a first charging path including the second capacitance means and the second winding; a second charging path including the first capacitance means and the first winding; a first discharging switch; a second discharging switch; a first discharging path including the first capacitance means, the first winding, and the first discharging switch, the first discharging switch serving as means for initiating the flow of current through the first discharging and charging paths; and a second discharging path including the second capacitance means, the second winding, and the second discharging switch, the second discharging switch serving as means for initiating the flow of current through the second discharging and charging paths.

Claim 12

A circuit as set forth in claim 8 wherein the first charging path includes an inductor and a diode.

Claim 13

A circuit as set forth in claim 8 wherein the second charging path includes an inductor and a diode.

Claim 14

In an inverter circuit, the combination of: a positive bus; a negative bus; an a-c bus; first power switching means for controlling the flow of current between the poSitive bus and the a-c bus; second power switching means for controlling the flow of current between the a-c bus and the negative bus; a commutating capacitor and a commutating inductor for applying resonant commutating currents to the first and second power switching means; a first commutating switch for initiating the application of resonant commutating current to the first power switching means; a second commutating switch for initiating the application of resonant commutating current to the second power switching means; a first commutating diode connected across the first power switching means; a second commutating diode connected across the second power switching means; a first capacitor connected across the first power switching means; a second capacitor connected across the second power switching means; and voltage shifting means for transferring the charge from the charged capacitor to the uncharged capacitor when the first and second power switching means are non-conducting.

Claim 15

In an inverter circuit, the combination of: a positive bus; a negative bus; an a-c bus; first power switching means for controlling the flow of current between the poSitive bus and the a-c bus; second power switching means for controlling the flow of current between the a-c bus and the negative bus; a commutating capacitor and a commutating inductor for applying resonant commutating currents to the first and second power switching means; a first commutating switch for initiating the application of resonant commutating current to the first power switching means; a second commutating switch for initiating the application of resonant commutating current to the second power switching means; a first commutating diode connected across the first power switching means; a second commutating diode connected across the second power switching means; a first capacitor connected across the first power switching means; a second capacitor connected across the second power switching means; and voltage shifting means for transferring the charge from the charged capacitor to the uncharged capacitor when the first and second power switching means are non-conducting.

Claim 16

A circuit as set forth in claim 11 wherein the voltage shifting means comprises: a transformer having first and second windings; a first charging path including the second capacitance means and the second winding; a second charging path including the first capacitance means and the first winding; a first discharging switch; a second discharging switch; a first discharging path including the first capacitance means, the first winding, and the first discharging switch, the first discharging switch serving as means for initiating the flow of current through the first discharging and charging paths; and a second discharging path including the second capacitance means, the second winding, and the second discharging switch, the second discharging switch serving as means for initiating the flow of current through the second discharging and charging paths.

Claim 17

A circuit as set forth in claim 12 wherein the first charging path includes an inductor and a diode.

Claim 18

A circuit as set forth in claim 12 wherein the second charging path includes an inductor and a diode.

Claim 19

In an inverter circuit, the combination of: a positive bus; a negative bus; an a-c bus; a first power switch connected between the positive bus and the a-c bus; a second power switch connected between the negative bus and the a-c bus; a first commutating diode connected across the first power switch; a second commutating diode connected across the second power switch; a first commutating switch connected to the positive bus; a second commutating switch connected to the negative bus; a commutating inductor; a commutating capacitor connected, through the commutating inductor and the first commutating switch, between the a-c bus and the positive bus and connected, through the commutating inductor and the second commutating switch, between the a-c bus and the negative bus; a first capacitor connected across the first power switch; a second capacitor connected across the second power switch; a transformer having first and second windings; a first discharging switch connected, through the first winding, across the first capacitor; a second discharging switch connected, through the second winding, across the second capacitor; a diode connected across both discharging switches; an inductor in series with the diode.

Claim 20

In an inverter circuit, the combination of: a positive bus; a negative bus; an a-c bus; a first power switch connected between the positive bus and the a-c bus; a second power switch connected between the negative bus and the a-c bus; a first commutating diode connected across the first power switch; a second commutating diode connected across the second power switch; a first commutating switch connected to the positive bus; a second commutating switch connected to the negative bus; a commutating inductor; a commutating capacitor connected, through the commutating inductor and the first commutating switch, between the a-c bus and the positive bus and connected, through the commutating inductor and the second commutating switch, between the a-c bus and the negative bus; a first capacitor connected across the first power switch; a second capacitor connected across the second power switch; a transformer having first and second windings; a first discharging switch connected, through the first winding, across the first capacitor; a second discharging switch connected, through the second winding, across the second capacitor; a diode connected across both discharging switches; an inductor in series with the diode.

Claim 21

In a inverter circuit, the combination of: a positive bus; a negative bus; an a-c bus; a first power switch connected between the positive bus and the a-c bus; a second power switch connected between the negative bus and the a-c bus; a first commutating diode connected across the first power switch; a second commutating diode connected across the second power switch; a first commutating switch connected to the positive bus; a second commutating switch connected to the negative bus; a commutating inductor; a commutating capacitor connected, through the commutating inductor and the first commutating switch, between the a-c bus and the positive bus and connected, through the commutating inductor and the second commutating switch, between the a-c bus and the negative bus; a first capacitor connected across the first power switch; a second capacitor connected across the second power switch; a transformer having first and second windings; a first discharging switch connected, through the first winding, across the first capacitor; a second discharging switch connected, through the second winding, across the second capacitor; an inductor connected across each discharging switch; and a diode in series with each inductor.

Claim 22

In a inverter circuit, the combination of: a positive bus; a negative bus; an a-c bus; a first power switch connected between the positive bus and the a-c bus; a second power switch connected between the negative bus and the a-c bus; a first commutating diode connected across the first power switch; a second commutating diode connected across the second power switch; a first commutating switch connected to the positive bus; a second commutating switch connected to the negative bus; a commutating inductor; a commutating capacitor connected, through the commutating inductor and the first commutating switch, between the a-c bus and the positive bus and connected, through the commutating inductor and the second commutating switch, between the a-c bus and the negative bus; a first capacitor connected across the first power switch; a second capacitor connected across the second power switch; a transformer having first and second windings; a first discharging switch connected, through the first winding, across the first capacitor; a second discharging switch connected, through the second winding, across the second capacitor; an inductor connected across each discharging switch; and a diode in series with each inductor.

Claim 23

In an inverter circuit, the combination of: a positive bus; a negative bus; an a-c bus; a first power switch connected between the positive bus and the a-c bus; a second power switch connected between the negative bus and the a-c bus; a first commutating diode connected across the first power switch; a second commutating diode connected across the second power switch; a first commutating switch connected to the positive bus; a second commutating switch connected to the negative bus; a commutating inductor; a commutating capacitor connected, through the commutating inductor and the first commutating switch, between the a-c bus and the positive bus and connected, through the commutating inductor and the second commutating switch, between the a-c bus and the negative bus; a first capacitor connected across the first power switch; a second capacitor connected across the second power switch; an inductor; a transformer having first and second windings; a first discharging switch connected, through the inductor and the first winding, across the first capacitor; a second discharging switch connected, through the inductor and the second winding, across the second capacitor; and a diode connected across each discharging switch.

Claim 24

In an inverter circuit, the combination of: a positive bus; a negative bus; an a-c bus; a first power switch connected between the positive bus and the a-c bus; a second power switch connected between the negative bus and the a-c bus; a first commutating diode connected across the first power switch; a second commutating diode connected across the second power switch; a first commutating switch connected to the positive bus; a second commutating switch connected to the negative bus; a commutating inductor; a commutating capacitor connected, through the commutating inductor and the first commutating switch, between the a-c bus and the positive bus and connected, through the commutating inductor and the second commutating switch, between the a-c bus and the negative bus; a first capacitor connected across the first power switch; a second capacitor connected across the second power switch; an inductor; a transformer having first and second windings; a first discharging switch connected, through the inductor and the first winding, across the first capacitor; a second discharging switch connected, through the inductor and the second winding, across the second capacitor; and a diode connected across each discharging switch.