Abstract The invention is a high speed parallel processor for determining the maximum signal output channel of a one-dimensional n-channel array, under the condition that only a single maximum exists and the outputs of other channels decrease monotonically with increasing separation from the maximum output channel position along the array. The processor output voltage is taken from a network of n, series connected, resistors (one resistor for each channel) that are connected between a constant current source and ground. A signal level comparator circuit compares the signal level of each channel with the signal level on its preceding channel. When the signal level on any given channel is greater than the signal level on its preceding channel the comparator circuit generates a signal that effects switching of the resistor associated with that channel to ground.
Inventors
👤 Uve H W Lammers
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-10-27 04:11
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/22; H03K5/24
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
166 words
A high speed parallel processor for determining the maximum signal output channel of a one-dimensional n-channel array comprising a parallel array of n signal sensing devices, a signal level comparator connected to compare the outputs of each adjacent pair of sensors, and a signal level comparator connected to compare the output of the first sensor with zero signal, each said comparator having first and second inputs and an output and being adapted to generate a switch actuating output signal only when the second input signal level is greater than the first input signal level, means connecting the first and second inputs of adjacent comparators, a constant current source, n resistors connected in series between said constant current source and ground, an output terminal connected between the nth resistor and said constant current source, a switch connected between the nth resistor and ground, and a switch connected between each resistor and ground, the output of each comparator being connected to and effective to actuate a discrete switch.
Claim 2
Dependent Claim
166 words
A high speed parallel processor for determining the maximum signal output channel of a one-dimensional n-channel array comprising a parallel array of n signal sensing devices, a signal level comparator connected to compare the outputs of each adjacent pair of sensors, and a signal level comparator connected to compare the output of the first sensor with zero signal, each said comparator having first and second inputs and an output and being adapted to generate a switch actuating output signal only when the second input signal level is greater than the first input signal level, means connecting the first and second inputs of adjacent comparators, a constant current source, n resistors connected in series between said constant current source and ground, an output terminal connected between the nth resistor and said constant current source, a switch connected between the nth resistor and ground, and a switch connected between each resistor and ground, the output of each comparator being connected to and effective to actuate a discrete switch.