Charge amplifier

Claim 2

In combination with a charge transfer register comprised of insulated-gate field-effect devices having a capacitive terminal, means for amplifying the charge at said capacitive terminal, comprising: an insulated-gate field-effect transistor of same conductivity type as said devices having first and second electrodes defining the ends of a conduction path and a control electrode; means connecting said control electrode to said capacitive terminal; a control terminal; a capacitor whose capacitance is greater than the capacitance at said capacitive terminal; means connecting said capacitor between said control terminal and one end of the conduction path of said transistor; means for applying a control signal to said control terminal of a polarity and amplitude to operate said insulated-gate fieldeffect transistor in the source follower mode for producing a charge signal across said capacitor in phase with and directly proportional to the signal present at said capacitive terminal; and means connected across the conduction path of said transistor responsive to the termination of said control signal for restoring the charge condition existing across said capacitor prior to the application of said control signal.

Claim 3

A charge amplifier comprising: a capacitive input point adapted to receiving signals, an output point, a control terminal, and a first point for the application thereto of a fixed potential; first and second transistors, each transistor having first and second electrodes defining the ends of a conduction path and a control electrode; means connecting said control electrode of said first transistor to said input point; means connecting the conduction paths of said first and second transistors in parallel between said output point and said first point; means connecting said control electrode of said second transistor to said output point; a capacitor whose capacitance is greater than the capacitance at said signal input point connected between said control terminal and said output point; and means for enabling said first transistor including means for applying a control signal to said control terminal, said control signal being coupled through said capacitor for application to said first transistor, said control signal having a polarity and amplitude to enable conduction through said first transistor, said first transistor when enabled conducting in a direction to produce a charge signal across said capacitor proportional to the signal present at said input point.

Claim 4

A charge amplifier comprising: a capacitive input point adapted to receiving signals, an output point, a control terminal, and a first point for the application thereto of a fixed potential; first and second transistors, each transistor having first and second electrodes defining the ends of a conduction path and a control electrode; means connecting said control electrode of said first transistor to said input point; means connecting the conduction paths of said first and second transistors in parallel between said output point and said first point; means connecting said control electrode of said second transistor to said output point; a capacitor whose capacitance is greater than the capacitance at said signal input point connected between said control terminal and said output point; and means for enabling said first transistor including means for applying a control signal to said control terminal, said control signal being coupled through said capacitor for application to said first transistor, said control signal having a polarity and amplitude to enable conduction through said first transistor, said first transistor when enabled conducting in a direction to produce a charge signal across said capacitor proportional to the signal present at said input point.

Claim 5

The combination as claimed in claim 2 wherein said pulse applied to said control terminal includes: (1) a first portion for producing said charge signal across said capacitor; (2) a second portion for shifting the level of said charge signal at said output point; and (3) a third portion for enabling said second transistor for returning the level at said output point to a predetermined level.

Claim 6

The combination as claimed in claim 2 wherein said first and second transistors are insulated-gate field-effect transistors.

Claim 7

The combination as claimed in claim 4 wherein said first and second transistors are of the same conductivity type.

Claim 8

In combination with a charge transfer register comprised of field-effect semiconductive devices of one conductivity type having a capacitive terminal, means for amplifying the charge at said capacitive terminal comprising: an additional field-effect semiconductor device of said one conductivity type having first and second electrodes defining the ends of a conduction path and a control electrode; means connecting said control electrode to said capacitive terminal; a control terminal; a capacitor whose capacitance is greater than the capacitance at said capacitive terminal; means connecting said capacitor between said control terminal and one end of the conduction path of said semiconductor device; means for applying a control signal to said control terminal of a polarity and amplitude to enable conduction through said additional semiconductor device for producing a charge signal across said capacitor proportional to the signal present at said capacitive terminal; and means connected across the conduction path of said additional field-effect semiconductor device for restoring a predetermined condition across said capacitor in response to the termination of said control signal.

Claim 9

In combination with a charge transfer register comprised of field-effect semiconductive devices of one conductivity type having a capacitive terminal, means for amplifying the charge at said capacitive terminal comprising: an additional field-effect semiconductor device of said one conductivity type having first and second electrodes defining the ends of a conduction path and a control electrode; means connecting said control electrode to said capacitive terminal; a control terminal; a capacitor whose capacitance is greater than the capacitance at said capacitive terminal; means connecting said capacitor between said control terminal and one end of the conduction path of said semiconductor device; means for applying a control signal to said control terminal of a polarity and amplitude to enable conduction through said additional semiconductor device for producing a charge signal across said capacitor proportional to the signal present at said capacitive terminal; and means connected across the conduction path of said additional field-effect semiconductor device for restoring a predetermined condition across said capacitor in response to the termination of said control signal.

Claim 10

The combination as claimed in claim 6 further including a point of fixed potential and means connecting the other end of said conduction path to said point of fixed potential.

Claim 11

The conbination as claimed in claim 7 wherein said means responsive to the termination of the control signal includes a second additional semiconductor device of said one conductivity type having a control electrode and a conduction path; and wherein the conduction path of said second additional semiconductor device is connected in parallel with the conduction path of said additional semiconductor device.

Claim 12

The combination as claimed in claim 6 further including additional charge transfer register stages connected in series, said additional stages having an input terminal coupled to that side of said capacitor which is coupled to the conduction path of said additional field-effect semiconductor device.